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From: Jordan Crouse <jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	David Airlie <airlied-cv59FeDIM0c@public.gmane.org>,
	linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
	dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Rob Clark <robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	georgi.djakov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
Subject: [PATCH v3 2/3] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU
Date: Thu, 20 Dec 2018 10:30:25 -0700	[thread overview]
Message-ID: <20181220173026.3857-3-jcrouse@codeaurora.org> (raw)
In-Reply-To: <20181220173026.3857-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>

Add documentation for the interconnect and interconnect-names bindings
for the GPU node as detailed by bindings/interconnect/interconnect.txt.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---

 Documentation/devicetree/bindings/display/msm/gpu.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
index 9c89f4fdb8ca..5b04393dcb15 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.txt
+++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
@@ -20,6 +20,8 @@ Required properties:
    - qcom,adreno-630.2
 - iommus: optional phandle to an adreno iommu instance
 - operating-points-v2: optional phandle to the OPP operating points
+- interconnect: optional phandle to a interconnect provider.  See
+  ../interconnect/interconnect.txt for details.
 - qcom,gmu: For GMU attached devices a phandle to the GMU device that will
   control the power for the GPU. Applicable targets:
     - qcom,adreno-630.2
@@ -68,6 +70,8 @@ Example a6xx (with GMU):
 
 		operating-points-v2 = <&gpu_opp_table>;
 
+		interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
+
 		qcom,gmu = <&gmu>;
 	};
 };
-- 
2.18.0

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  parent reply	other threads:[~2018-12-20 17:30 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-20 17:30 [PATCH v3 0/3] arm64: dts: sdm845: Add sdm845 GPU interconnect Jordan Crouse
     [not found] ` <20181220173026.3857-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-12-20 17:30   ` Jordan Crouse [this message]
2018-12-20 19:30     ` [PATCH v3 2/3] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU Doug Anderson
2018-12-21 18:28     ` Rob Herring
     [not found]     ` <20181220173026.3857-3-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2019-02-21 12:06       ` Georgi Djakov
2018-12-20 17:30   ` [PATCH v3 3/3] arm64: dts: sdm845: Add interconnect " Jordan Crouse
     [not found]     ` <20181220173026.3857-4-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-12-20 19:31       ` Doug Anderson

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