From mboxrd@z Thu Jan 1 00:00:00 1970 From: Miquel Raynal Subject: [PATCH v3 12/15] ARM64: dts: marvell: armada-37xx: declare PCIe clock Date: Tue, 8 Jan 2019 17:24:37 +0100 Message-ID: <20190108162441.5278-13-miquel.raynal@bootlin.com> References: <20190108162441.5278-1-miquel.raynal@bootlin.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20190108162441.5278-1-miquel.raynal@bootlin.com> Sender: linux-kernel-owner@vger.kernel.org To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , Bjorn Helgaas Cc: devicetree@vger.kernel.org, Rob Herring , Mark Rutland , Lorenzo Pieralisi , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Antoine Tenart , Maxime Chevallier , Nadav Haklai , Miquel Raynal List-Id: devicetree@vger.kernel.org The PCIe IP is fed by a gated clock. Signed-off-by: Miquel Raynal --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 65bf774516ec..f6f8d2b3b2c1 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -414,6 +414,7 @@ #address-cells = <3>; #size-cells = <2>; bus-range = <0x00 0xff>; + clocks = <&sb_periph_clk 13>; interrupts = ; #interrupt-cells = <1>; msi-parent = <&pcie0>; -- 2.19.1