From mboxrd@z Thu Jan 1 00:00:00 1970 From: Miquel Raynal Subject: [PATCH v3 13/15] ARM64: dts: marvell: armada-3720-espressobin: declare PCIe PHY Date: Tue, 8 Jan 2019 17:24:38 +0100 Message-ID: <20190108162441.5278-14-miquel.raynal@bootlin.com> References: <20190108162441.5278-1-miquel.raynal@bootlin.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20190108162441.5278-1-miquel.raynal@bootlin.com> Sender: linux-kernel-owner@vger.kernel.org To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , Bjorn Helgaas Cc: devicetree@vger.kernel.org, Rob Herring , Mark Rutland , Lorenzo Pieralisi , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Antoine Tenart , Maxime Chevallier , Nadav Haklai , Miquel Raynal List-Id: devicetree@vger.kernel.org The PCIe node is wired to the second PHY of the COMPHY IP. Suggested-by: Grzegorz Jaszczyk Signed-off-by: Miquel Raynal --- arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts index 094994a9c68e..c5c72902c647 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts @@ -46,6 +46,7 @@ /* J9 */ &pcie0 { status = "okay"; + phys = <&comphy1 0>; }; /* J6 */ -- 2.19.1