* [PATCH 1/2] ARM: dts: at91: at91-sama5d27_som1: add QSPI1 + SPI NOR memory nodes
@ 2018-12-12 16:31 Tudor.Ambarus
2018-12-12 16:31 ` [PATCH 2/2] ARM: dts: at91: at91-sama5d27_som1_ek: enable qspi1 memory Tudor.Ambarus
2019-01-08 18:14 ` [PATCH 1/2] ARM: dts: at91: at91-sama5d27_som1: add QSPI1 + SPI NOR memory nodes Alexandre Belloni
0 siblings, 2 replies; 5+ messages in thread
From: Tudor.Ambarus @ 2018-12-12 16:31 UTC (permalink / raw)
To: Nicolas.Ferre, alexandre.belloni, Ludovic.Desroches, robh+dt,
mark.rutland, Claudiu.Beznea
Cc: linux-arm-kernel, devicetree, linux-kernel, boris.brezillon,
linux-mtd, broonie, linux-spi, Tudor.Ambarus
From: Claudiu Beznea <claudiu.beznea@microchip.com>
Configure the QSPI1 controller pin muxing and declare the
jedec,spi-nor memory (SST26VF064).
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
[tudor.ambarus@microchip.com: add spi-rx/tx-bus-width, drop partitions,
reword commit.]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
index cf0087b4c9e1..33a159c0163f 100644
--- a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
+++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
@@ -62,6 +62,20 @@
ahb {
apb {
+ qspi1: spi@f0024000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_qspi1_default>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <80000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ m25p,fast-read;
+ };
+ };
+
macb0: ethernet@f8008000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb0_default>;
@@ -78,6 +92,22 @@
pinctrl@fc038000 {
+ pinctrl_qspi1_default: qspi1_default {
+ sck_cs {
+ pinmux = <PIN_PB5__QSPI1_SCK>,
+ <PIN_PB6__QSPI1_CS>;
+ bias-disable;
+ };
+
+ data {
+ pinmux = <PIN_PB7__QSPI1_IO0>,
+ <PIN_PB8__QSPI1_IO1>,
+ <PIN_PB9__QSPI1_IO2>,
+ <PIN_PB10__QSPI1_IO3>;
+ bias-pull-up;
+ };
+ };
+
pinctrl_macb0_default: macb0_default {
pinmux = <PIN_PD9__GTXCK>,
<PIN_PD10__GTXEN>,
--
2.9.4
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/2] ARM: dts: at91: at91-sama5d27_som1_ek: enable qspi1 memory
2018-12-12 16:31 [PATCH 1/2] ARM: dts: at91: at91-sama5d27_som1: add QSPI1 + SPI NOR memory nodes Tudor.Ambarus
@ 2018-12-12 16:31 ` Tudor.Ambarus
2019-01-08 18:14 ` Alexandre Belloni
2019-01-08 18:15 ` Alexandre Belloni
2019-01-08 18:14 ` [PATCH 1/2] ARM: dts: at91: at91-sama5d27_som1: add QSPI1 + SPI NOR memory nodes Alexandre Belloni
1 sibling, 2 replies; 5+ messages in thread
From: Tudor.Ambarus @ 2018-12-12 16:31 UTC (permalink / raw)
To: Nicolas.Ferre, alexandre.belloni, Ludovic.Desroches, robh+dt,
mark.rutland, Claudiu.Beznea
Cc: linux-arm-kernel, devicetree, linux-kernel, boris.brezillon,
linux-mtd, broonie, linux-spi
From: Claudiu Beznea <claudiu.beznea@microchip.com>
Enable qspi1.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
index 363a43d77424..73d16d98bf9c 100644
--- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
+++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
@@ -109,6 +109,10 @@
status = "okay";
};
+ qspi1: spi@f0024000 {
+ status = "okay";
+ };
+
spi0: spi@f8000000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0_default>;
--
2.9.4
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 2/2] ARM: dts: at91: at91-sama5d27_som1_ek: enable qspi1 memory
2018-12-12 16:31 ` [PATCH 2/2] ARM: dts: at91: at91-sama5d27_som1_ek: enable qspi1 memory Tudor.Ambarus
@ 2019-01-08 18:14 ` Alexandre Belloni
2019-01-08 18:15 ` Alexandre Belloni
1 sibling, 0 replies; 5+ messages in thread
From: Alexandre Belloni @ 2019-01-08 18:14 UTC (permalink / raw)
To: Tudor.Ambarus
Cc: Nicolas.Ferre, Ludovic.Desroches, robh+dt, mark.rutland,
Claudiu.Beznea, linux-arm-kernel, devicetree, linux-kernel,
boris.brezillon, linux-mtd, broonie, linux-spi
On 12/12/2018 16:31:11+0000, Tudor.Ambarus@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@microchip.com>
>
> Enable qspi1.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
> arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 4 ++++
> 1 file changed, 4 insertions(+)
>
Applied, thanks.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] ARM: dts: at91: at91-sama5d27_som1_ek: enable qspi1 memory
2018-12-12 16:31 ` [PATCH 2/2] ARM: dts: at91: at91-sama5d27_som1_ek: enable qspi1 memory Tudor.Ambarus
2019-01-08 18:14 ` Alexandre Belloni
@ 2019-01-08 18:15 ` Alexandre Belloni
1 sibling, 0 replies; 5+ messages in thread
From: Alexandre Belloni @ 2019-01-08 18:15 UTC (permalink / raw)
To: Tudor.Ambarus
Cc: Nicolas.Ferre, Ludovic.Desroches, robh+dt, mark.rutland,
Claudiu.Beznea, linux-arm-kernel, devicetree, linux-kernel,
boris.brezillon, linux-mtd, broonie, linux-spi
On 12/12/2018 16:31:11+0000, Tudor.Ambarus@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@microchip.com>
>
> Enable qspi1.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Note that this should have your SoB too as you are sending a patch that
is not from you.
> ---
> arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
> index 363a43d77424..73d16d98bf9c 100644
> --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
> +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
> @@ -109,6 +109,10 @@
> status = "okay";
> };
>
> + qspi1: spi@f0024000 {
> + status = "okay";
> + };
> +
> spi0: spi@f8000000 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_spi0_default>;
> --
> 2.9.4
>
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] ARM: dts: at91: at91-sama5d27_som1: add QSPI1 + SPI NOR memory nodes
2018-12-12 16:31 [PATCH 1/2] ARM: dts: at91: at91-sama5d27_som1: add QSPI1 + SPI NOR memory nodes Tudor.Ambarus
2018-12-12 16:31 ` [PATCH 2/2] ARM: dts: at91: at91-sama5d27_som1_ek: enable qspi1 memory Tudor.Ambarus
@ 2019-01-08 18:14 ` Alexandre Belloni
1 sibling, 0 replies; 5+ messages in thread
From: Alexandre Belloni @ 2019-01-08 18:14 UTC (permalink / raw)
To: Tudor.Ambarus
Cc: Nicolas.Ferre, Ludovic.Desroches, robh+dt, mark.rutland,
Claudiu.Beznea, linux-arm-kernel, devicetree, linux-kernel,
boris.brezillon, linux-mtd, broonie, linux-spi
On 12/12/2018 16:31:08+0000, Tudor.Ambarus@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@microchip.com>
>
> Configure the QSPI1 controller pin muxing and declare the
> jedec,spi-nor memory (SST26VF064).
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> [tudor.ambarus@microchip.com: add spi-rx/tx-bus-width, drop partitions,
> reword commit.]
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
> ---
> arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
Applied, thanks.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-01-08 18:15 UTC | newest]
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2018-12-12 16:31 [PATCH 1/2] ARM: dts: at91: at91-sama5d27_som1: add QSPI1 + SPI NOR memory nodes Tudor.Ambarus
2018-12-12 16:31 ` [PATCH 2/2] ARM: dts: at91: at91-sama5d27_som1_ek: enable qspi1 memory Tudor.Ambarus
2019-01-08 18:14 ` Alexandre Belloni
2019-01-08 18:15 ` Alexandre Belloni
2019-01-08 18:14 ` [PATCH 1/2] ARM: dts: at91: at91-sama5d27_som1: add QSPI1 + SPI NOR memory nodes Alexandre Belloni
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