From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tomer Maimon Subject: [PATCH v2 1/2] dt-binding: iio: add NPCM ADC documentation Date: Wed, 9 Jan 2019 18:43:42 +0200 Message-ID: <20190109164343.164205-2-tmaimon77@gmail.com> References: <20190109164343.164205-1-tmaimon77@gmail.com> Return-path: In-Reply-To: <20190109164343.164205-1-tmaimon77@gmail.com> Sender: linux-kernel-owner@vger.kernel.org To: jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, robh+dt@kernel.org, mark.rutland@arm.com, yuenn@google.com, venture@google.com, brendanhiggins@google.com, avifishman70@gmail.com, joel@jms.id.au Cc: linux-iio@vger.kernel.org, openbmc@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Tomer Maimon List-Id: devicetree@vger.kernel.org Added device tree binding documentation for Nuvoton BMC NPCM Analog-to-Digital Converter(ADC). Signed-off-by: Tomer Maimon --- .../bindings/iio/adc/nuvoton,npcm-adc.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt diff --git a/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt new file mode 100644 index 000000000000..1b8132cd9060 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt @@ -0,0 +1,35 @@ +Nuvoton NPCM Analog to Digital Converter (ADC) + +The NPCM ADC is a 10-bit converter for eight channel inputs. + +Required properties: +- compatible: "nuvoton,npcm750-adc" for the NPCM7XX BMC. +- reg: specifies physical base address and size of the registers. +- interrupts: Contain the ADC interrupt with flags for falling edge. + +Optional properties: +- clocks: phandle of ADC reference clock, in case the clock is not + added the ADC will use the default ADC sample rate. +- vref-supply: The regulator supply ADC reference voltage, in case the + vref-supply is not added the ADC will use internal voltage + reference. + +Required Node in the NPCM7xx BMC: +An additional register is present in the NPCM7xx SOC which is +assumed to be in the same device tree, with and marked as +compatible with "nuvoton,npcm750-rst". + +Example: + +adc: adc@f000c000 { + compatible = "nuvoton,npcm750-adc"; + reg = <0xf000c000 0x8>; + interrupts = ; + clocks = <&clk NPCM7XX_CLK_ADC>; +}; + +rst: rst@f0801000 { + compatible = "nuvoton,npcm750-rst", "syscon", + "simple-mfd"; + reg = <0xf0801000 0x6C>; +}; -- 2.14.1