* [PATCH 1/6] dt-bindings: timer: add Tegra210 timer [not found] <20190107032810.13522-1-josephl@nvidia.com> @ 2019-01-07 3:28 ` Joseph Lo 2019-01-11 22:21 ` Rob Herring 2019-01-24 10:30 ` Jon Hunter 0 siblings, 2 replies; 7+ messages in thread From: Joseph Lo @ 2019-01-07 3:28 UTC (permalink / raw) To: Thierry Reding, Jonathan Hunter Cc: linux-tegra, linux-arm-kernel, Joseph Lo, Daniel Lezcano, Thomas Gleixner, linux-kernel, devicetree The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived from the oscillator clock (TMR0-TMR9) or directly at the oscillator clock (TMR10-TMR13). Each TMR can be programmed to generate one-shot periodic, or watchdog interrupts. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Joseph Lo <josephl@nvidia.com> --- .../bindings/timer/nvidia,tegra210-timer.txt | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt new file mode 100644 index 000000000000..ba511220a669 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt @@ -0,0 +1,25 @@ +NVIDIA Tegra210 timer + +The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit +timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived +from the oscillator clock (TMR0-TMR9) or directly at the oscillator clock +(TMR10-TMR13). Each TMR can be programmed to generate one-shot, periodic, +or watchdog interrupts. + +Required properties: +- compatible : "nvidia,tegra210-timer". +- reg : Specifies base physical address and size of the registers. +- interrupts : A list of 4 interrupts; one per each of TMR10 through TMR13. +- clocks : Must contain one entry, for the module clock. + See ../clocks/clock-bindings.txt for details. + +timer@60005000 { + compatible = "nvidia,tegra210-timer"; + reg = <0x0 0x60005000 0x0 0x400>; + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA210_CLK_TIMER>; + clock-names = "timer"; +}; -- 2.20.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/6] dt-bindings: timer: add Tegra210 timer 2019-01-07 3:28 ` [PATCH 1/6] dt-bindings: timer: add Tegra210 timer Joseph Lo @ 2019-01-11 22:21 ` Rob Herring 2019-01-24 10:30 ` Jon Hunter 1 sibling, 0 replies; 7+ messages in thread From: Rob Herring @ 2019-01-11 22:21 UTC (permalink / raw) Cc: Thierry Reding, Jonathan Hunter, linux-tegra, linux-arm-kernel, Joseph Lo, Daniel Lezcano, Thomas Gleixner, linux-kernel, devicetree On Mon, 7 Jan 2019 11:28:05 +0800, Joseph Lo wrote: > The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit > timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived > from the oscillator clock (TMR0-TMR9) or directly at the oscillator clock > (TMR10-TMR13). Each TMR can be programmed to generate one-shot periodic, > or watchdog interrupts. > > Cc: Daniel Lezcano <daniel.lezcano@linaro.org> > Cc: Thomas Gleixner <tglx@linutronix.de> > Cc: linux-kernel@vger.kernel.org > Cc: devicetree@vger.kernel.org > Signed-off-by: Joseph Lo <josephl@nvidia.com> > --- > .../bindings/timer/nvidia,tegra210-timer.txt | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt > Reviewed-by: Rob Herring <robh@kernel.org> ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/6] dt-bindings: timer: add Tegra210 timer 2019-01-07 3:28 ` [PATCH 1/6] dt-bindings: timer: add Tegra210 timer Joseph Lo 2019-01-11 22:21 ` Rob Herring @ 2019-01-24 10:30 ` Jon Hunter 2019-01-25 3:23 ` Joseph Lo 1 sibling, 1 reply; 7+ messages in thread From: Jon Hunter @ 2019-01-24 10:30 UTC (permalink / raw) To: Joseph Lo, Thierry Reding Cc: linux-tegra, linux-arm-kernel, Daniel Lezcano, Thomas Gleixner, linux-kernel, devicetree On 07/01/2019 03:28, Joseph Lo wrote: > The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit > timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived > from the oscillator clock (TMR0-TMR9) or directly at the oscillator clock > (TMR10-TMR13). Each TMR can be programmed to generate one-shot periodic, > or watchdog interrupts. > > Cc: Daniel Lezcano <daniel.lezcano@linaro.org> > Cc: Thomas Gleixner <tglx@linutronix.de> > Cc: linux-kernel@vger.kernel.org > Cc: devicetree@vger.kernel.org > Signed-off-by: Joseph Lo <josephl@nvidia.com> > --- > .../bindings/timer/nvidia,tegra210-timer.txt | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt > > diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt > new file mode 100644 > index 000000000000..ba511220a669 > --- /dev/null > +++ b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt > @@ -0,0 +1,25 @@ > +NVIDIA Tegra210 timer > + > +The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit > +timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived > +from the oscillator clock (TMR0-TMR9) or directly at the oscillator clock > +(TMR10-TMR13). Each TMR can be programmed to generate one-shot, periodic, > +or watchdog interrupts. > + > +Required properties: > +- compatible : "nvidia,tegra210-timer". > +- reg : Specifies base physical address and size of the registers. > +- interrupts : A list of 4 interrupts; one per each of TMR10 through TMR13. Why do we only add the interrupts for TMR10 - TMR13? What about the others? Cheers Jon -- nvpublic ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/6] dt-bindings: timer: add Tegra210 timer 2019-01-24 10:30 ` Jon Hunter @ 2019-01-25 3:23 ` Joseph Lo 2019-01-25 12:01 ` Jon Hunter 0 siblings, 1 reply; 7+ messages in thread From: Joseph Lo @ 2019-01-25 3:23 UTC (permalink / raw) To: Jon Hunter, Thierry Reding Cc: devicetree, Daniel Lezcano, linux-kernel, linux-tegra, Thomas Gleixner, linux-arm-kernel Hi Jon, Thanks for reviewing. On 1/24/19 6:30 PM, Jon Hunter wrote: > > On 07/01/2019 03:28, Joseph Lo wrote: >> The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit >> timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived >> from the oscillator clock (TMR0-TMR9) or directly at the oscillator clock >> (TMR10-TMR13). Each TMR can be programmed to generate one-shot periodic, >> or watchdog interrupts. >> >> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> >> Cc: Thomas Gleixner <tglx@linutronix.de> >> Cc: linux-kernel@vger.kernel.org >> Cc: devicetree@vger.kernel.org >> Signed-off-by: Joseph Lo <josephl@nvidia.com> >> --- >> .../bindings/timer/nvidia,tegra210-timer.txt | 25 +++++++++++++++++++ >> 1 file changed, 25 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >> >> diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >> new file mode 100644 >> index 000000000000..ba511220a669 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >> @@ -0,0 +1,25 @@ >> +NVIDIA Tegra210 timer >> + >> +The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit >> +timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived >> +from the oscillator clock (TMR0-TMR9) or directly at the oscillator clock >> +(TMR10-TMR13). Each TMR can be programmed to generate one-shot, periodic, >> +or watchdog interrupts. >> + >> +Required properties: >> +- compatible : "nvidia,tegra210-timer". >> +- reg : Specifies base physical address and size of the registers. >> +- interrupts : A list of 4 interrupts; one per each of TMR10 through TMR13. > > Why do we only add the interrupts for TMR10 - TMR13? What about the others? > The others (TMR0-TMR9) are occupied for other usages. TMR5 is occupied for the watchdog timer in the upstream kernel. And others (still in TMR0-TMR9) are occupied for different usages in our downstream kernel. And notice that only TMR10-TMR13 are running at the oscillator clock (clk_m). With the Tegra210 timer driver, we introduce in this series, which only replace the clock event device function that was originally owned by the arch timer (armv8 timer) and it also running at the oscillator clock. The sched_timer still owns by the arch timer. So the timer resolution will be the same. That's why we choose TMR10-TMR13 as the timer for Tegra210. Thanks, Joseph ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/6] dt-bindings: timer: add Tegra210 timer 2019-01-25 3:23 ` Joseph Lo @ 2019-01-25 12:01 ` Jon Hunter 2019-01-25 12:06 ` Jon Hunter 2019-01-28 3:09 ` Joseph Lo 0 siblings, 2 replies; 7+ messages in thread From: Jon Hunter @ 2019-01-25 12:01 UTC (permalink / raw) To: Joseph Lo, Thierry Reding Cc: devicetree, Daniel Lezcano, linux-kernel, linux-tegra, Thomas Gleixner, linux-arm-kernel On 25/01/2019 03:23, Joseph Lo wrote: > Hi Jon, > > Thanks for reviewing. > > On 1/24/19 6:30 PM, Jon Hunter wrote: >> >> On 07/01/2019 03:28, Joseph Lo wrote: >>> The Tegra210 timer provides fourteen 29-bit timer counters and one >>> 32-bit >>> timestamp counter. The TMRs run at either a fixed 1 MHz clock rate >>> derived >>> from the oscillator clock (TMR0-TMR9) or directly at the oscillator >>> clock >>> (TMR10-TMR13). Each TMR can be programmed to generate one-shot periodic, >>> or watchdog interrupts. >>> >>> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> >>> Cc: Thomas Gleixner <tglx@linutronix.de> >>> Cc: linux-kernel@vger.kernel.org >>> Cc: devicetree@vger.kernel.org >>> Signed-off-by: Joseph Lo <josephl@nvidia.com> >>> --- >>> .../bindings/timer/nvidia,tegra210-timer.txt | 25 +++++++++++++++++++ >>> 1 file changed, 25 insertions(+) >>> create mode 100644 >>> Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>> >>> diff --git >>> a/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>> b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>> new file mode 100644 >>> index 000000000000..ba511220a669 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>> @@ -0,0 +1,25 @@ >>> +NVIDIA Tegra210 timer >>> + >>> +The Tegra210 timer provides fourteen 29-bit timer counters and one >>> 32-bit >>> +timestamp counter. The TMRs run at either a fixed 1 MHz clock rate >>> derived >>> +from the oscillator clock (TMR0-TMR9) or directly at the oscillator >>> clock >>> +(TMR10-TMR13). Each TMR can be programmed to generate one-shot, >>> periodic, >>> +or watchdog interrupts. >>> + >>> +Required properties: >>> +- compatible : "nvidia,tegra210-timer". >>> +- reg : Specifies base physical address and size of the registers. >>> +- interrupts : A list of 4 interrupts; one per each of TMR10 through >>> TMR13. >> >> Why do we only add the interrupts for TMR10 - TMR13? What about the >> others? >> > > The others (TMR0-TMR9) are occupied for other usages. TMR5 is occupied > for the watchdog timer in the upstream kernel. And others (still in > TMR0-TMR9) are occupied for different usages in our downstream kernel. Where is TMR5 reserved for the watchdog? I don't see this? > And notice that only TMR10-TMR13 are running at the oscillator clock > (clk_m). With the Tegra210 timer driver, we introduce in this series, > which only replace the clock event device function that was originally > owned by the arch timer (armv8 timer) and it also running at the > oscillator clock. The sched_timer still owns by the arch timer. So the > timer resolution will be the same. That's why we choose TMR10-TMR13 as > the timer for Tegra210. That maybe fine, but DT should describe the hardware and so I don't see why we would not list all the interrupts. We can still only use TMR10-13 in the driver. Cheers Jon -- nvpublic _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/6] dt-bindings: timer: add Tegra210 timer 2019-01-25 12:01 ` Jon Hunter @ 2019-01-25 12:06 ` Jon Hunter 2019-01-28 3:09 ` Joseph Lo 1 sibling, 0 replies; 7+ messages in thread From: Jon Hunter @ 2019-01-25 12:06 UTC (permalink / raw) To: Joseph Lo, Thierry Reding Cc: devicetree, Daniel Lezcano, linux-kernel, linux-tegra, Thomas Gleixner, linux-arm-kernel On 25/01/2019 12:01, Jon Hunter wrote: > > On 25/01/2019 03:23, Joseph Lo wrote: >> Hi Jon, >> >> Thanks for reviewing. >> >> On 1/24/19 6:30 PM, Jon Hunter wrote: >>> >>> On 07/01/2019 03:28, Joseph Lo wrote: >>>> The Tegra210 timer provides fourteen 29-bit timer counters and one >>>> 32-bit >>>> timestamp counter. The TMRs run at either a fixed 1 MHz clock rate >>>> derived >>>> from the oscillator clock (TMR0-TMR9) or directly at the oscillator >>>> clock >>>> (TMR10-TMR13). Each TMR can be programmed to generate one-shot periodic, >>>> or watchdog interrupts. >>>> >>>> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> >>>> Cc: Thomas Gleixner <tglx@linutronix.de> >>>> Cc: linux-kernel@vger.kernel.org >>>> Cc: devicetree@vger.kernel.org >>>> Signed-off-by: Joseph Lo <josephl@nvidia.com> >>>> --- >>>> .../bindings/timer/nvidia,tegra210-timer.txt | 25 +++++++++++++++++++ >>>> 1 file changed, 25 insertions(+) >>>> create mode 100644 >>>> Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>>> >>>> diff --git >>>> a/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>>> b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>>> new file mode 100644 >>>> index 000000000000..ba511220a669 >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>>> @@ -0,0 +1,25 @@ >>>> +NVIDIA Tegra210 timer >>>> + >>>> +The Tegra210 timer provides fourteen 29-bit timer counters and one >>>> 32-bit >>>> +timestamp counter. The TMRs run at either a fixed 1 MHz clock rate >>>> derived >>>> +from the oscillator clock (TMR0-TMR9) or directly at the oscillator >>>> clock >>>> +(TMR10-TMR13). Each TMR can be programmed to generate one-shot, >>>> periodic, >>>> +or watchdog interrupts. >>>> + >>>> +Required properties: >>>> +- compatible : "nvidia,tegra210-timer". >>>> +- reg : Specifies base physical address and size of the registers. >>>> +- interrupts : A list of 4 interrupts; one per each of TMR10 through >>>> TMR13. >>> >>> Why do we only add the interrupts for TMR10 - TMR13? What about the >>> others? >>> >> >> The others (TMR0-TMR9) are occupied for other usages. TMR5 is occupied >> for the watchdog timer in the upstream kernel. And others (still in >> TMR0-TMR9) are occupied for different usages in our downstream kernel. > > Where is TMR5 reserved for the watchdog? I don't see this? I see it now, it is hard-coded in the driver. I was looking at arm64 to see where it is used. Cheers Jon -- nvpublic ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/6] dt-bindings: timer: add Tegra210 timer 2019-01-25 12:01 ` Jon Hunter 2019-01-25 12:06 ` Jon Hunter @ 2019-01-28 3:09 ` Joseph Lo 1 sibling, 0 replies; 7+ messages in thread From: Joseph Lo @ 2019-01-28 3:09 UTC (permalink / raw) To: Jon Hunter, Thierry Reding Cc: devicetree, Daniel Lezcano, linux-kernel, linux-tegra, Thomas Gleixner, linux-arm-kernel On 1/25/19 8:01 PM, Jon Hunter wrote: > > On 25/01/2019 03:23, Joseph Lo wrote: >> Hi Jon, >> >> Thanks for reviewing. >> >> On 1/24/19 6:30 PM, Jon Hunter wrote: >>> >>> On 07/01/2019 03:28, Joseph Lo wrote: >>>> The Tegra210 timer provides fourteen 29-bit timer counters and one >>>> 32-bit >>>> timestamp counter. The TMRs run at either a fixed 1 MHz clock rate >>>> derived >>>> from the oscillator clock (TMR0-TMR9) or directly at the oscillator >>>> clock >>>> (TMR10-TMR13). Each TMR can be programmed to generate one-shot periodic, >>>> or watchdog interrupts. >>>> >>>> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> >>>> Cc: Thomas Gleixner <tglx@linutronix.de> >>>> Cc: linux-kernel@vger.kernel.org >>>> Cc: devicetree@vger.kernel.org >>>> Signed-off-by: Joseph Lo <josephl@nvidia.com> >>>> --- >>>> .../bindings/timer/nvidia,tegra210-timer.txt | 25 +++++++++++++++++++ >>>> 1 file changed, 25 insertions(+) >>>> create mode 100644 >>>> Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>>> >>>> diff --git >>>> a/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>>> b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>>> new file mode 100644 >>>> index 000000000000..ba511220a669 >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt >>>> @@ -0,0 +1,25 @@ >>>> +NVIDIA Tegra210 timer >>>> + >>>> +The Tegra210 timer provides fourteen 29-bit timer counters and one >>>> 32-bit >>>> +timestamp counter. The TMRs run at either a fixed 1 MHz clock rate >>>> derived >>>> +from the oscillator clock (TMR0-TMR9) or directly at the oscillator >>>> clock >>>> +(TMR10-TMR13). Each TMR can be programmed to generate one-shot, >>>> periodic, >>>> +or watchdog interrupts. >>>> + >>>> +Required properties: >>>> +- compatible : "nvidia,tegra210-timer". >>>> +- reg : Specifies base physical address and size of the registers. >>>> +- interrupts : A list of 4 interrupts; one per each of TMR10 through >>>> TMR13. >>> [snip] >> And notice that only TMR10-TMR13 are running at the oscillator clock >> (clk_m). With the Tegra210 timer driver, we introduce in this series, >> which only replace the clock event device function that was originally >> owned by the arch timer (armv8 timer) and it also running at the >> oscillator clock. The sched_timer still owns by the arch timer. So the >> timer resolution will be the same. That's why we choose TMR10-TMR13 as >> the timer for Tegra210. > > That maybe fine, but DT should describe the hardware and so I don't see > why we would not list all the interrupts. We can still only use TMR10-13 > in the driver. > Okay, will list all the interrupts for each timer channel. Thanks, Joseph _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 7+ messages in thread
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[not found] <20190107032810.13522-1-josephl@nvidia.com>
2019-01-07 3:28 ` [PATCH 1/6] dt-bindings: timer: add Tegra210 timer Joseph Lo
2019-01-11 22:21 ` Rob Herring
2019-01-24 10:30 ` Jon Hunter
2019-01-25 3:23 ` Joseph Lo
2019-01-25 12:01 ` Jon Hunter
2019-01-25 12:06 ` Jon Hunter
2019-01-28 3:09 ` Joseph Lo
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