From mboxrd@z Thu Jan 1 00:00:00 1970 From: Guido =?iso-8859-1?Q?G=FCnther?= Subject: [PATCH v2] arm64: dts: imx8mq: Add pwm Date: Mon, 14 Jan 2019 18:03:16 +0100 Message-ID: <20190114170316.GB4168@bogon.m.sigxcpu.org> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org List-Id: devicetree@vger.kernel.org We can reuse the pwm from fsl,imx27-pwm as with other imx SOCs. Signed-off-by: Guido G=FCnther --- Changes from v1 (thanks Lucas Stach for the review): - fix indentation of multine entries - move to AIPS2 bus arch/arm64/boot/dts/freescale/imx8mq.dtsi | 44 +++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dt= s/freescale/imx8mq.dtsi index 8e9d6d5ed7b2..0b42fcb1ecaa 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -259,6 +259,50 @@ #address-cells =3D <1>; #size-cells =3D <1>; ranges =3D <0x30400000 0x30400000 0x400000>; + + pwm1: pwm@30660000 { + compatible =3D "fsl,imx8mq-pwm", "fsl,imx27-pwm"; + reg =3D <0x30660000 0x10000>; + interrupts =3D ; + clocks =3D <&clk IMX8MQ_CLK_PWM1_ROOT>, + <&clk IMX8MQ_CLK_PWM1_ROOT>; + clock-names =3D "ipg", "per"; + #pwm-cells =3D <2>; + status =3D "disabled"; + }; + + pwm2: pwm@30670000 { + compatible =3D "fsl,imx8mq-pwm", "fsl,imx27-pwm"; + reg =3D <0x30670000 0x10000>; + interrupts =3D ; + clocks =3D <&clk IMX8MQ_CLK_PWM2_ROOT>, + <&clk IMX8MQ_CLK_PWM2_ROOT>; + clock-names =3D "ipg", "per"; + #pwm-cells =3D <2>; + status =3D "disabled"; + }; + + pwm3: pwm@30680000 { + compatible =3D "fsl,imx8mq-pwm", "fsl,imx27-pwm"; + reg =3D <0x30680000 0x10000>; + interrupts =3D ; + clocks =3D <&clk IMX8MQ_CLK_PWM3_ROOT>, + <&clk IMX8MQ_CLK_PWM3_ROOT>; + clock-names =3D "ipg", "per"; + #pwm-cells =3D <2>; + status =3D "disabled"; + }; + + pwm4: pwm@30690000 { + compatible =3D "fsl,imx8mq-pwm", "fsl,imx27-pwm"; + reg =3D <0x30690000 0x10000>; + interrupts =3D ; + clocks =3D <&clk IMX8MQ_CLK_PWM4_ROOT>, + <&clk IMX8MQ_CLK_PWM4_ROOT>; + clock-names =3D "ipg", "per"; + #pwm-cells =3D <2>; + status =3D "disabled"; + }; }; = bus@30800000 { /* AIPS3 */ -- = 2.20.1