* [PATCH v2] arm64: dts: imx8mq: Add pwm
@ 2019-01-14 17:03 Guido Günther
2019-01-15 8:29 ` Lucas Stach
2019-01-16 2:24 ` Shawn Guo
0 siblings, 2 replies; 3+ messages in thread
From: Guido Günther @ 2019-01-14 17:03 UTC (permalink / raw)
To: Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Rob Herring, Mark Rutland, linux-arm-kernel,
devicetree
We can reuse the pwm from fsl,imx27-pwm as with other imx SOCs.
Signed-off-by: Guido Günther <agx@sigxcpu.org>
---
Changes from v1 (thanks Lucas Stach for the review):
- fix indentation of multine entries
- move to AIPS2 bus
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 44 +++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 8e9d6d5ed7b2..0b42fcb1ecaa 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -259,6 +259,50 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x30400000 0x30400000 0x400000>;
+
+ pwm1: pwm@30660000 {
+ compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
+ reg = <0x30660000 0x10000>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_PWM1_ROOT>,
+ <&clk IMX8MQ_CLK_PWM1_ROOT>;
+ clock-names = "ipg", "per";
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm2: pwm@30670000 {
+ compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
+ reg = <0x30670000 0x10000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_PWM2_ROOT>,
+ <&clk IMX8MQ_CLK_PWM2_ROOT>;
+ clock-names = "ipg", "per";
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm3: pwm@30680000 {
+ compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
+ reg = <0x30680000 0x10000>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_PWM3_ROOT>,
+ <&clk IMX8MQ_CLK_PWM3_ROOT>;
+ clock-names = "ipg", "per";
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
+
+ pwm4: pwm@30690000 {
+ compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
+ reg = <0x30690000 0x10000>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_PWM4_ROOT>,
+ <&clk IMX8MQ_CLK_PWM4_ROOT>;
+ clock-names = "ipg", "per";
+ #pwm-cells = <2>;
+ status = "disabled";
+ };
};
bus@30800000 { /* AIPS3 */
--
2.20.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH v2] arm64: dts: imx8mq: Add pwm
2019-01-14 17:03 [PATCH v2] arm64: dts: imx8mq: Add pwm Guido Günther
@ 2019-01-15 8:29 ` Lucas Stach
2019-01-16 2:24 ` Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Lucas Stach @ 2019-01-15 8:29 UTC (permalink / raw)
To: Guido Günther, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Rob Herring, Mark Rutland, linux-arm-kernel, devicetree
Am Montag, den 14.01.2019, 18:03 +0100 schrieb Guido Günther:
> We can reuse the pwm from fsl,imx27-pwm as with other imx SOCs.
>
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> Changes from v1 (thanks Lucas Stach for the review):
> - fix indentation of multine entries
> - move to AIPS2 bus
>
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 44 +++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 8e9d6d5ed7b2..0b42fcb1ecaa 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -259,6 +259,50 @@
> > #address-cells = <1>;
> > #size-cells = <1>;
> > ranges = <0x30400000 0x30400000 0x400000>;
> +
> > > + pwm1: pwm@30660000 {
> > + compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
> > + reg = <0x30660000 0x10000>;
> > + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MQ_CLK_PWM1_ROOT>,
> > + <&clk IMX8MQ_CLK_PWM1_ROOT>;
> > + clock-names = "ipg", "per";
> > + #pwm-cells = <2>;
> > + status = "disabled";
> > + };
> +
> > > + pwm2: pwm@30670000 {
> > + compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
> > + reg = <0x30670000 0x10000>;
> > + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MQ_CLK_PWM2_ROOT>,
> > + <&clk IMX8MQ_CLK_PWM2_ROOT>;
> > + clock-names = "ipg", "per";
> > + #pwm-cells = <2>;
> > + status = "disabled";
> > + };
> +
> > > + pwm3: pwm@30680000 {
> > + compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
> > + reg = <0x30680000 0x10000>;
> > + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MQ_CLK_PWM3_ROOT>,
> > + <&clk IMX8MQ_CLK_PWM3_ROOT>;
> > + clock-names = "ipg", "per";
> > + #pwm-cells = <2>;
> > + status = "disabled";
> > + };
> +
> > > + pwm4: pwm@30690000 {
> > + compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
> > + reg = <0x30690000 0x10000>;
> > + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MQ_CLK_PWM4_ROOT>,
> > + <&clk IMX8MQ_CLK_PWM4_ROOT>;
> > + clock-names = "ipg", "per";
> > + #pwm-cells = <2>;
> > + status = "disabled";
> > + };
> > };
>
> > bus@30800000 { /* AIPS3 */
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^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH v2] arm64: dts: imx8mq: Add pwm
2019-01-14 17:03 [PATCH v2] arm64: dts: imx8mq: Add pwm Guido Günther
2019-01-15 8:29 ` Lucas Stach
@ 2019-01-16 2:24 ` Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Shawn Guo @ 2019-01-16 2:24 UTC (permalink / raw)
To: Guido Günther
Cc: Mark Rutland, devicetree, Sascha Hauer, Rob Herring,
NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam,
linux-arm-kernel
On Mon, Jan 14, 2019 at 06:03:16PM +0100, Guido Günther wrote:
> We can reuse the pwm from fsl,imx27-pwm as with other imx SOCs.
>
> Signed-off-by: Guido Günther <agx@sigxcpu.org>
Applied, thanks.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2019-01-15 8:29 ` Lucas Stach
2019-01-16 2:24 ` Shawn Guo
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