From mboxrd@z Thu Jan 1 00:00:00 1970 From: Manivannan Sadhasivam Subject: Re: [PATCH 6/8 v3] arm64: dts: hi3660: Add dma to uart nodes Date: Thu, 17 Jan 2019 22:26:29 +0530 Message-ID: <20190117165629.GI5283@Mani-XPS-13-9360> References: <1547141652-8660-1-git-send-email-john.stultz@linaro.org> <1547141652-8660-7-git-send-email-john.stultz@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1547141652-8660-7-git-send-email-john.stultz@linaro.org> Sender: linux-kernel-owner@vger.kernel.org To: John Stultz Cc: lkml , Tanglei Han , Zhuangluan Su , Ryan Grachek , Wei Xu , Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org List-Id: devicetree@vger.kernel.org On Thu, Jan 10, 2019 at 09:34:10AM -0800, John Stultz wrote: > Try to add DMA support to the uart nodes following > the assignments made in the dts from the victoria vendor kernel > here: > https://consumer.huawei.com/en/opensource/detail/?siteCode=worldwide&keywords=p10&fileType=openSourceSoftware&pageSize=10&curPage=1 > > Cc: Tanglei Han > Cc: Zhuangluan Su > Cc: Ryan Grachek > Cc: Manivannan Sadhasivam > Cc: Wei Xu > Cc: Rob Herring > Cc: Mark Rutland > Cc: linux-arm-kernel@lists.infradead.org > Cc: devicetree@vger.kernel.org > Signed-off-by: John Stultz Acked-by: Manivannan Sadhasivam Thanks, Mani > --- > v3: > * Remove dma enablment on uart0 which would use reserved channel 0 > --- > arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > index 20ae40d..4c8d682 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > @@ -478,6 +478,8 @@ > compatible = "arm,pl011", "arm,primecell"; > reg = <0x0 0xfdf00000 0x0 0x1000>; > interrupts = ; > + dma-names = "rx", "tx"; > + dmas = <&dma0 2 &dma0 3>; > clocks = <&crg_ctrl HI3660_CLK_GATE_UART1>, > <&crg_ctrl HI3660_CLK_GATE_UART1>; > clock-names = "uartclk", "apb_pclk"; > @@ -490,6 +492,8 @@ > compatible = "arm,pl011", "arm,primecell"; > reg = <0x0 0xfdf03000 0x0 0x1000>; > interrupts = ; > + dma-names = "rx", "tx"; > + dmas = <&dma0 4 &dma0 5>; > clocks = <&crg_ctrl HI3660_CLK_GATE_UART2>, > <&crg_ctrl HI3660_PCLK>; > clock-names = "uartclk", "apb_pclk"; > @@ -514,6 +518,8 @@ > compatible = "arm,pl011", "arm,primecell"; > reg = <0x0 0xfdf01000 0x0 0x1000>; > interrupts = ; > + dma-names = "rx", "tx"; > + dmas = <&dma0 6 &dma0 7>; > clocks = <&crg_ctrl HI3660_CLK_GATE_UART4>, > <&crg_ctrl HI3660_CLK_GATE_UART4>; > clock-names = "uartclk", "apb_pclk"; > @@ -526,6 +532,8 @@ > compatible = "arm,pl011", "arm,primecell"; > reg = <0x0 0xfdf05000 0x0 0x1000>; > interrupts = ; > + dma-names = "rx", "tx"; > + dmas = <&dma0 8 &dma0 9>; > clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>, > <&crg_ctrl HI3660_CLK_GATE_UART5>; > clock-names = "uartclk", "apb_pclk"; > -- > 2.7.4 >