From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Cercueil Subject: [PATCH 1/8] MIPS: DTS: CI20: Set BCH clock to 200 MHz Date: Thu, 17 Jan 2019 22:06:27 -0300 Message-ID: <20190118010634.27399-1-paul@crapouillou.net> Return-path: Sender: linux-kernel-owner@vger.kernel.org To: David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , James Hogan , Miquel Raynal , Harvey Hunt Cc: linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Paul Cercueil List-Id: devicetree@vger.kernel.org This is currently done inside the jz4780-bch driver, but it really should be done here instead. Signed-off-by: Paul Cercueil --- arch/mips/boot/dts/ingenic/ci20.dts | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index 50cff3cbcc6d..aa892ec54d0a 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -111,6 +111,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pins_nemc>; + assigned-clocks = <&cgu JZ4780_CLK_BCH>; + assigned-clock-rates = <200000000>; + nand@1 { reg = <1>; -- 2.11.0