* [PATCH 1/2] mtd: add DT bindings for the Intel IXP4xx Flash
@ 2019-02-01 10:04 Linus Walleij
2019-02-18 21:29 ` Rob Herring
0 siblings, 1 reply; 2+ messages in thread
From: Linus Walleij @ 2019-02-01 10:04 UTC (permalink / raw)
To: David Woodhouse, Brian Norris, Boris Brezillon, Marek Vasut,
Richard Weinberger, linux-mtd
Cc: devicetree, Linus Walleij
This adds device tree bindings for the Intel IXP4xx
flash controller, a simple physmap which however need a
specific big-endian or mixed-endian access pattern to the
memory.
Cc: devicetree@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
.../bindings/mtd/intel,ixp4xx-flash.txt | 22 +++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt
diff --git a/Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt b/Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt
new file mode 100644
index 000000000000..4bdcb92ae381
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt
@@ -0,0 +1,22 @@
+Flash device on Intel IXP4xx SoC
+
+This flash is regular CFI compatible (Intel or AMD extended) flash chips with
+specific big-endian or mixed-endian memory access pattern.
+
+Required properties:
+- compatible : must be "intel,ixp4xx-flash", "cfi-flash";
+- reg : memory address for the flash chip
+- bank-width : width in bytes of flash interface, should be <2>
+
+For the rest of the properties, see mtd-physmap.txt.
+
+The device tree may optionally contain sub-nodes describing partitions of the
+address space. See partition.txt for more detail.
+
+Example:
+
+flash@50000000 {
+ compatible = "intel,ixp4xx-flash", "cfi-flash";
+ reg = <0x50000000 0x01000000>;
+ bank-width = <2>;
+};
--
2.20.1
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH 1/2] mtd: add DT bindings for the Intel IXP4xx Flash
2019-02-01 10:04 [PATCH 1/2] mtd: add DT bindings for the Intel IXP4xx Flash Linus Walleij
@ 2019-02-18 21:29 ` Rob Herring
0 siblings, 0 replies; 2+ messages in thread
From: Rob Herring @ 2019-02-18 21:29 UTC (permalink / raw)
To: Linus Walleij
Cc: devicetree, Boris Brezillon, Richard Weinberger, Marek Vasut,
MTD Maling List, Brian Norris, David Woodhouse
On Fri, Feb 1, 2019 at 4:04 AM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> This adds device tree bindings for the Intel IXP4xx
> flash controller, a simple physmap which however need a
> specific big-endian or mixed-endian access pattern to the
> memory.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> .../bindings/mtd/intel,ixp4xx-flash.txt | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mtd/intel,ixp4xx-flash.txt
Reviewed-by: Rob Herring <robh@kernel.org>
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