From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lj1-f193.google.com ([209.85.208.193]:43047 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726710AbfBBX7R (ORCPT ); Sat, 2 Feb 2019 18:59:17 -0500 Received: by mail-lj1-f193.google.com with SMTP id q2-v6so8781236lji.10 for ; Sat, 02 Feb 2019 15:59:15 -0800 (PST) From: Linus Walleij Subject: [PATCH 1/2] USB: gadget: pxa25x: Add DT bindings Date: Sun, 3 Feb 2019 00:59:07 +0100 Message-Id: <20190202235908.30751-1-linus.walleij@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: devicetree-owner@vger.kernel.org To: Greg Kroah-Hartman , Felipe Balbi Cc: linux-usb@vger.kernel.org, Linus Walleij , Robert Jarzmik , devicetree@vger.kernel.org List-ID: This adds device tree bindings for the PXA25x USB Device Controller as found in the PXA25x and the IXP4xx. Cc: Robert Jarzmik Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij --- .../devicetree/bindings/usb/pxa25x-udc.txt | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/pxa25x-udc.txt diff --git a/Documentation/devicetree/bindings/usb/pxa25x-udc.txt b/Documentation/devicetree/bindings/usb/pxa25x-udc.txt new file mode 100644 index 000000000000..bbdbe0df3565 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/pxa25x-udc.txt @@ -0,0 +1,27 @@ +PXA25x UDC (USB Device Controller) + +The PXA25x and IXP4xx USB Device Controller is different from the +PXA27x UDC described in pxa-usb.txt and is compatible between the +Marvell PXA25x and the Intel IXP4xx devices. + +Required properties: + - compatible: Should be one of + "marvell,pxa25x-udc" + "intel,ixp4xx-udc" + for USB controllers used in device mode. + - reg: usb device MMIO address space + - interrupts: single interrupt generated by the UDC IP + - clocks: input clock of the UDC IP (see clock-bindings.txt) + +Optional properties: + - gpios: + - gpio activated to control the USB D+ pullup (see gpio.txt) + +Example: + +usb@c800b000 { + compatible = "intel,ixp4xx-udc"; + reg = <0xc800b000 0x1000>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pclk 0>; +}; -- 2.20.1