From: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
To: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: Ulf Hansson <ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
Chris Blake
<chrisrblake93-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 1/3] mmc: sunxi: Disable HS-DDR mode for H5 eMMC controller by default
Date: Mon, 4 Feb 2019 10:32:14 +0100 [thread overview]
Message-ID: <20190204093214.7zbomq5cddacdrmj@flea> (raw)
In-Reply-To: <20190203155628.16767-2-wens-jdAy2FN1RRM@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 954 bytes --]
On Sun, Feb 03, 2019 at 11:56:26PM +0800, Chen-Yu Tsai wrote:
> Some H5 boards seem to not have proper trace lengths for eMMC to be able
> to use the default setting for the delay chains under HS-DDR mode. These
> include the Bananapi M2+ H5 and NanoPi NEO Core2. However the Libre
> Computer ALL-H3-CC-H5 works just fine.
>
> For the H5 (at least for now), default to not enabling HS-DDR modes in
> the driver, and expect the device tree to signal HS-DDR capability on
> boards that work.
>
> Reported-by: Chris Blake <chrisrblake93-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Fixes: 07bafc1e3536 ("mmc: sunxi: Use new timing mode for A64 eMMC controller")
> Cc: <stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Acked-by: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2019-02-04 9:32 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-03 15:56 mmc: sunxi: Fix eMMC usage on H5 boards Chen-Yu Tsai
[not found] ` <20190203155628.16767-1-wens-jdAy2FN1RRM@public.gmane.org>
2019-02-03 15:56 ` [PATCH 1/3] mmc: sunxi: Disable HS-DDR mode for H5 eMMC controller by default Chen-Yu Tsai
[not found] ` <20190203155628.16767-2-wens-jdAy2FN1RRM@public.gmane.org>
2019-02-04 9:32 ` Maxime Ripard [this message]
2019-02-03 15:56 ` [PATCH 2/3] mmc: sunxi: Filter out unsupported modes declared in the device tree Chen-Yu Tsai
[not found] ` <20190203155628.16767-3-wens-jdAy2FN1RRM@public.gmane.org>
2019-02-04 9:34 ` Maxime Ripard
2019-02-04 10:16 ` Chen-Yu Tsai
[not found] ` <CAGb2v64-3Cs_RaO4erAr96JStEUzZ7ZRDjAYYjK2QsWfxusKxQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-02-04 13:41 ` Maxime Ripard
2019-02-05 8:42 ` Chen-Yu Tsai
2019-02-05 9:51 ` Maxime Ripard
2019-02-03 15:56 ` [PATCH 3/3] arm64: dts: allwinner: h5: libretech-all-h3-cc: Mark eMMC HS-DDR 3.3V capable Chen-Yu Tsai
2019-02-03 15:59 ` [PATCH 0/3] mmc: sunxi: Fix eMMC usage on H5 boards Chen-Yu Tsai
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