From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [linux-sunxi] Re: [PATCH RESEND v2 06/12] drm/sun4i: rgb: Add 1% tolerance to dclk frequency check when bridge is connected Date: Wed, 6 Feb 2019 10:16:08 +0100 Message-ID: <20190206091608.yvws7iyjuhw3xsdk@flea> References: <20190203185501.8958-1-anarsoul@gmail.com> <20190203185501.8958-7-anarsoul@gmail.com> <20190204142036.vd42nvyjnjr5yeoi@flea> <0F6CBEA4-6DB6-40F1-A2FD-65101AF64F1F@aosc.io> <20190205154156.o3aa4cy6uxenkwol@flea> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2086806998==" Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Vasily Khoruzhick Cc: Mark Rutland , devicetree , David Airlie , Chen-Yu Tsai , dri-devel , linux-sunxi , Rob Herring , Thierry Reding , Laurent Pinchart , Sean Paul , arm-linux , Icenowy Zheng List-Id: devicetree@vger.kernel.org --===============2086806998== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="6mbqqqmv7k77dcll" Content-Disposition: inline --6mbqqqmv7k77dcll Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Feb 05, 2019 at 09:49:17AM -0800, Vasily Khoruzhick wrote: > On Tue, Feb 5, 2019 at 7:42 AM Maxime Ripard = wrote: > > > > On Mon, Feb 04, 2019 at 10:50:17AM -0800, Vasily Khoruzhick wrote: > > > On Mon, Feb 4, 2019 at 8:29 AM Icenowy Zheng wrote: > > > > >> IIRC, from the previous discussion, HDMI had a tolerancy require= ment > > > > >> in the standard. Do you know if there's such a thing for eDP? Th= at > > > > >> would solve the issue for all the eDP displays at once. > > > > > > > > > >I don't have access to eDP standard - vesa.org says it's available= to > > > > >members only. > > > > > > > > Try out to grab an old version? > > > > > > > > I remember 1.0 is open. > > > > > > I can't find anything regarding dot clock tolerance in DisplayPort > > > specification. > > > > I guess since the DP is a VESA spec, it's probably .5%, just like on > > the EDID (well, CVT). >=20 > Unfortunately that's not enough for Pinebook. It needs 1% for 768p > panel. And that mode is stored in the EDID as a standard (or established) timing, or a detailed timing? If the latter, then it should also provide the tolerancies as part of the panel timing description. If the former, then what would be the advertised pixel clock and the one we can compute? Maybe we have a bug somewhere. Maxime --=20 Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --6mbqqqmv7k77dcll Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXFql0gAKCRDj7w1vZxhR xWGpAP9D/c/QkTM7RkEmYqX278PgTsD6DZQS9V3WGIvI9bLJXgEAm3+HDc3qJQPA 0HQwnjxRf6y79VXPkZBpd2H0cw1tdQY= =vBLL -----END PGP SIGNATURE----- --6mbqqqmv7k77dcll-- --===============2086806998== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVs IG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== --===============2086806998==--