* [PATCH v1 20/24] dt: thermal: tsens: Add bindings for qcs404
2019-02-07 10:49 [PATCH v1 00/24] thermal: tsens: Refactor to use regmap_field Amit Kucheria
@ 2019-02-07 10:49 ` Amit Kucheria
2019-02-25 22:31 ` Rob Herring
2019-02-07 10:49 ` [PATCH v1 22/24] arm64: dts: qcom: qcs404: Add tsens controller Amit Kucheria
2019-02-07 10:49 ` [PATCH v1 23/24] arm64: dts: qcom: qcs404: Add thermal zones for each sensor Amit Kucheria
2 siblings, 1 reply; 7+ messages in thread
From: Amit Kucheria @ 2019-02-07 10:49 UTC (permalink / raw)
To: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval,
andy.gross, Daniel Lezcano, David Brown, Zhang Rui
Cc: linux-pm, devicetree
qcs404 uses v1 of the TSENS IP block. Create a fallback DT property
"qcom,tsens-v1" to gather common code
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
---
.../devicetree/bindings/thermal/qcom-tsens.txt | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt
index 1d9e8cf61018..673cc1831ee9 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt
@@ -6,11 +6,14 @@ Required properties:
- "qcom,msm8916-tsens" (MSM8916)
- "qcom,msm8974-tsens" (MSM8974)
- "qcom,msm8996-tsens" (MSM8996)
+ - "qcom,qcs404-tsens", "qcom,tsens-v1" (QCS404)
- "qcom,msm8998-tsens", "qcom,tsens-v2" (MSM8998)
- "qcom,sdm845-tsens", "qcom,tsens-v2" (SDM845)
The generic "qcom,tsens-v2" property must be used as a fallback for any SoC
with version 2 of the TSENS IP. MSM8996 is the only exception because the
generic property did not exist when support was added.
+ Similarly, the generic "qcom,tsens-v1" property must be used as a fallback for
+ any SoC with version 1 of the TSENS IP.
- reg: Address range of the thermal registers.
New platforms containing v2.x.y of the TSENS IP must specify the SROT and TM
@@ -39,3 +42,14 @@ tsens0: thermal-sensor@c263000 {
#qcom,sensors = <13>;
#thermal-sensor-cells = <1>;
};
+
+Example 3 (for any platform containing v1 of the TSENS IP):
+tsens: thermal-sensor@4a9000 {
+ compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
+ reg = <0x004a9000 0x1000>, /* TM */
+ <0x004a8000 0x1000>; /* SROT */
+ nvmem-cells = <&tsens_caldata>;
+ nvmem-cell-names = "calib";
+ #qcom,sensors = <10>;
+ #thermal-sensor-cells = <1>;
+ };
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v1 20/24] dt: thermal: tsens: Add bindings for qcs404
2019-02-07 10:49 ` [PATCH v1 20/24] dt: thermal: tsens: Add bindings for qcs404 Amit Kucheria
@ 2019-02-25 22:31 ` Rob Herring
0 siblings, 0 replies; 7+ messages in thread
From: Rob Herring @ 2019-02-25 22:31 UTC (permalink / raw)
To: Amit Kucheria
Cc: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval,
andy.gross, Daniel Lezcano, David Brown, Zhang Rui, linux-pm,
devicetree
On Thu, 7 Feb 2019 16:19:38 +0530, Amit Kucheria wrote:
> qcs404 uses v1 of the TSENS IP block. Create a fallback DT property
> "qcom,tsens-v1" to gather common code
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> ---
> .../devicetree/bindings/thermal/qcom-tsens.txt | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v1 22/24] arm64: dts: qcom: qcs404: Add tsens controller
2019-02-07 10:49 [PATCH v1 00/24] thermal: tsens: Refactor to use regmap_field Amit Kucheria
2019-02-07 10:49 ` [PATCH v1 20/24] dt: thermal: tsens: Add bindings for qcs404 Amit Kucheria
@ 2019-02-07 10:49 ` Amit Kucheria
2019-02-07 10:49 ` [PATCH v1 23/24] arm64: dts: qcom: qcs404: Add thermal zones for each sensor Amit Kucheria
2 siblings, 0 replies; 7+ messages in thread
From: Amit Kucheria @ 2019-02-07 10:49 UTC (permalink / raw)
To: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval,
andy.gross, Daniel Lezcano, David Brown, Zhang Rui
Cc: devicetree
qcs404 has a single TSENS IP block with 10 sensors. The calibration data
is stored in an eeprom (qfprom) that is accessed through the nvmem
framework. We add the qfprom node to allow the tsens sensors to be
calibrated correctly.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 9b5c16562bbe..57d14d8f0c90 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -253,6 +253,16 @@
reg = <0x00060000 0x6000>;
};
+ qfprom: qfprom@a4000 {
+ compatible = "qcom,qfprom";
+ reg = <0x000a4000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ tsens_caldata: caldata@d0 {
+ reg = <0x1f8 0x14>;
+ };
+ };
+
rng: rng@e3000 {
compatible = "qcom,prng-ee";
reg = <0x000e3000 0x1000>;
@@ -260,6 +270,16 @@
clock-names = "core";
};
+ tsens: thermal-sensor@4a9000 {
+ compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
+ reg = <0x004a9000 0x1000>, /* TM */
+ <0x004a8000 0x1000>; /* SROT */
+ nvmem-cells = <&tsens_caldata>;
+ nvmem-cell-names = "calib";
+ #qcom,sensors = <10>;
+ #thermal-sensor-cells = <1>;
+ };
+
tlmm: pinctrl@1000000 {
compatible = "qcom,qcs404-pinctrl";
reg = <0x01000000 0x200000>,
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v1 23/24] arm64: dts: qcom: qcs404: Add thermal zones for each sensor
2019-02-07 10:49 [PATCH v1 00/24] thermal: tsens: Refactor to use regmap_field Amit Kucheria
2019-02-07 10:49 ` [PATCH v1 20/24] dt: thermal: tsens: Add bindings for qcs404 Amit Kucheria
2019-02-07 10:49 ` [PATCH v1 22/24] arm64: dts: qcom: qcs404: Add tsens controller Amit Kucheria
@ 2019-02-07 10:49 ` Amit Kucheria
2019-02-20 1:09 ` Eduardo Valentin
2 siblings, 1 reply; 7+ messages in thread
From: Amit Kucheria @ 2019-02-07 10:49 UTC (permalink / raw)
To: linux-kernel, linux-arm-msm, bjorn.andersson, edubezval,
andy.gross, Daniel Lezcano, David Brown, Zhang Rui
Cc: devicetree
qcs404 has 10 sensors connected to the single TSENS IP. Define a thermal
zone for each of those sensors to expose the temperature of each zone.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 243 +++++++++++++++++++++++++++
1 file changed, 243 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 57d14d8f0c90..ca99c45864df 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -3,6 +3,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-qcs404.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&intc>;
@@ -30,6 +31,7 @@
reg = <0x100>;
enable-method = "psci";
next-level-cache = <&L2_0>;
+ #cooling-cells= <2>;
};
CPU1: cpu@101 {
@@ -38,6 +40,7 @@
reg = <0x101>;
enable-method = "psci";
next-level-cache = <&L2_0>;
+ #cooling-cells= <2>;
};
CPU2: cpu@102 {
@@ -46,6 +49,7 @@
reg = <0x102>;
enable-method = "psci";
next-level-cache = <&L2_0>;
+ #cooling-cells= <2>;
};
CPU3: cpu@103 {
@@ -54,6 +58,7 @@
reg = <0x103>;
enable-method = "psci";
next-level-cache = <&L2_0>;
+ #cooling-cells= <2>;
};
L2_0: l2-cache {
@@ -507,4 +512,242 @@
#interrupt-cells = <2>;
};
};
+
+ thermal-zones {
+ aoss-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 0>;
+
+ trips {
+ aoss_alert0: trip-point@0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ aoss_crit: aoss_crit {
+ temperature = <110000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ dsp-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 1>;
+
+ trips {
+ dsp_alert0: trip-point@0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ dsp_crit: dsp_crit {
+ temperature = <110000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ lpass-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 2>;
+
+ trips {
+ lpass_alert0: trip-point@0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ lpass_crit: lpass_crit {
+ temperature = <110000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ wlan-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 3>;
+
+ trips {
+ wlan_alert0: trip-point@0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ wlan_crit: wlan_crit {
+ temperature = <110000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cluster-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 4>;
+
+ trips {
+ cluster_alert0: trip-point@0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cluster_crit: cluster_crit {
+ temperature = <110000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ cpu0-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 5>;
+
+ trips {
+ cpu0_alert0: trip-point@0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu0_crit: cpu_crit {
+ temperature = <110000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ map0 {
+ trip = <&cpu0_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu1-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 6>;
+
+ trips {
+ cpu1_alert0: trip-point@0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu1_crit: cpu_crit {
+ temperature = <110000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ map0 {
+ trip = <&cpu1_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu2-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 7>;
+
+ trips {
+ cpu2_alert0: trip-point@0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu2_crit: cpu_crit {
+ temperature = <110000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ map0 {
+ trip = <&cpu2_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu3-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 8>;
+
+ trips {
+ cpu3_alert0: trip-point@0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ cpu3_crit: cpu_crit {
+ temperature = <110000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ cooling-maps {
+ map0 {
+ trip = <&cpu3_alert0>;
+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+
+ thermal-sensors = <&tsens 9>;
+
+ trips {
+ gpu_alert0: trip-point@0 {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+ gpu_crit: gpu_crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
};
--
2.17.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v1 23/24] arm64: dts: qcom: qcs404: Add thermal zones for each sensor
2019-02-07 10:49 ` [PATCH v1 23/24] arm64: dts: qcom: qcs404: Add thermal zones for each sensor Amit Kucheria
@ 2019-02-20 1:09 ` Eduardo Valentin
2019-02-20 9:40 ` Amit Kucheria
0 siblings, 1 reply; 7+ messages in thread
From: Eduardo Valentin @ 2019-02-20 1:09 UTC (permalink / raw)
To: Amit Kucheria
Cc: linux-kernel, linux-arm-msm, bjorn.andersson, andy.gross,
Daniel Lezcano, David Brown, Zhang Rui, devicetree
On Thu, Feb 07, 2019 at 04:19:41PM +0530, Amit Kucheria wrote:
> qcs404 has 10 sensors connected to the single TSENS IP. Define a thermal
> zone for each of those sensors to expose the temperature of each zone.
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/qcs404.dtsi | 243 +++++++++++++++++++++++++++
> 1 file changed, 243 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> index 57d14d8f0c90..ca99c45864df 100644
> --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> @@ -3,6 +3,7 @@
>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/qcom,gcc-qcs404.h>
> +#include <dt-bindings/thermal/thermal.h>
>
> / {
> interrupt-parent = <&intc>;
> @@ -30,6 +31,7 @@
> reg = <0x100>;
> enable-method = "psci";
> next-level-cache = <&L2_0>;
> + #cooling-cells= <2>;
> };
>
> CPU1: cpu@101 {
> @@ -38,6 +40,7 @@
> reg = <0x101>;
> enable-method = "psci";
> next-level-cache = <&L2_0>;
> + #cooling-cells= <2>;
> };
>
> CPU2: cpu@102 {
> @@ -46,6 +49,7 @@
> reg = <0x102>;
> enable-method = "psci";
> next-level-cache = <&L2_0>;
> + #cooling-cells= <2>;
> };
>
> CPU3: cpu@103 {
> @@ -54,6 +58,7 @@
> reg = <0x103>;
> enable-method = "psci";
> next-level-cache = <&L2_0>;
> + #cooling-cells= <2>;
> };
>
> L2_0: l2-cache {
> @@ -507,4 +512,242 @@
> #interrupt-cells = <2>;
> };
> };
> +
> + thermal-zones {
There are several zones with passive trips and no cooling maps.
> + aoss-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens 0>;
> +
> + trips {
> + aoss_alert0: trip-point@0 {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + aoss_crit: aoss_crit {
> + temperature = <110000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + dsp-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens 1>;
> +
> + trips {
> + dsp_alert0: trip-point@0 {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + dsp_crit: dsp_crit {
> + temperature = <110000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + lpass-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens 2>;
> +
> + trips {
> + lpass_alert0: trip-point@0 {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + lpass_crit: lpass_crit {
> + temperature = <110000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + wlan-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens 3>;
> +
> + trips {
> + wlan_alert0: trip-point@0 {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + wlan_crit: wlan_crit {
> + temperature = <110000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cluster-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens 4>;
> +
> + trips {
> + cluster_alert0: trip-point@0 {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + cluster_crit: cluster_crit {
> + temperature = <110000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
> +
> + cpu0-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens 5>;
> +
> + trips {
> + cpu0_alert0: trip-point@0 {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + cpu0_crit: cpu_crit {
> + temperature = <110000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + map0 {
> + trip = <&cpu0_alert0>;
> + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> +
> + cpu1-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens 6>;
> +
> + trips {
> + cpu1_alert0: trip-point@0 {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + cpu1_crit: cpu_crit {
> + temperature = <110000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + map0 {
> + trip = <&cpu1_alert0>;
> + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> +
> + cpu2-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens 7>;
> +
> + trips {
> + cpu2_alert0: trip-point@0 {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + cpu2_crit: cpu_crit {
> + temperature = <110000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + map0 {
> + trip = <&cpu2_alert0>;
> + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> +
> + cpu3-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens 8>;
> +
> + trips {
> + cpu3_alert0: trip-point@0 {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + cpu3_crit: cpu_crit {
> + temperature = <110000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + map0 {
> + trip = <&cpu3_alert0>;
> + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> +
> + gpu-thermal {
> + polling-delay-passive = <250>;
> + polling-delay = <1000>;
> +
> + thermal-sensors = <&tsens 9>;
> +
> + trips {
> + gpu_alert0: trip-point@0 {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + gpu_crit: gpu_crit {
> + temperature = <95000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + };
> + };
> };
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH v1 23/24] arm64: dts: qcom: qcs404: Add thermal zones for each sensor
2019-02-20 1:09 ` Eduardo Valentin
@ 2019-02-20 9:40 ` Amit Kucheria
0 siblings, 0 replies; 7+ messages in thread
From: Amit Kucheria @ 2019-02-20 9:40 UTC (permalink / raw)
To: Eduardo Valentin
Cc: Linux Kernel Mailing List, linux-arm-msm, Bjorn Andersson,
Andy Gross, Daniel Lezcano, David Brown, Zhang Rui, DTML
On Wed, Feb 20, 2019 at 6:39 AM Eduardo Valentin <edubezval@gmail.com> wrote:
>
> On Thu, Feb 07, 2019 at 04:19:41PM +0530, Amit Kucheria wrote:
> > qcs404 has 10 sensors connected to the single TSENS IP. Define a thermal
> > zone for each of those sensors to expose the temperature of each zone.
> >
> > Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> > ---
> > arch/arm64/boot/dts/qcom/qcs404.dtsi | 243 +++++++++++++++++++++++++++
> > 1 file changed, 243 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> > index 57d14d8f0c90..ca99c45864df 100644
> > --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> > @@ -3,6 +3,7 @@
> >
> > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > #include <dt-bindings/clock/qcom,gcc-qcs404.h>
> > +#include <dt-bindings/thermal/thermal.h>
> >
> > / {
> > interrupt-parent = <&intc>;
> > @@ -30,6 +31,7 @@
> > reg = <0x100>;
> > enable-method = "psci";
> > next-level-cache = <&L2_0>;
> > + #cooling-cells= <2>;
> > };
> >
> > CPU1: cpu@101 {
> > @@ -38,6 +40,7 @@
> > reg = <0x101>;
> > enable-method = "psci";
> > next-level-cache = <&L2_0>;
> > + #cooling-cells= <2>;
> > };
> >
> > CPU2: cpu@102 {
> > @@ -46,6 +49,7 @@
> > reg = <0x102>;
> > enable-method = "psci";
> > next-level-cache = <&L2_0>;
> > + #cooling-cells= <2>;
> > };
> >
> > CPU3: cpu@103 {
> > @@ -54,6 +58,7 @@
> > reg = <0x103>;
> > enable-method = "psci";
> > next-level-cache = <&L2_0>;
> > + #cooling-cells= <2>;
> > };
> >
> > L2_0: l2-cache {
> > @@ -507,4 +512,242 @@
> > #interrupt-cells = <2>;
> > };
> > };
> > +
> > + thermal-zones {
>
> There are several zones with passive trips and no cooling maps.
Indeed. The policy bits are still a WIP and in some cases the
throttling is handled by someone in userspace. But I'd like to expose
at least the temperatures at each of the sensors to make it easier for
others to use this information. See my reply to the cover letter.
Regards,
Amit
> > + aoss-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens 0>;
> > +
> > + trips {
> > + aoss_alert0: trip-point@0 {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > + aoss_crit: aoss_crit {
> > + temperature = <110000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + dsp-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens 1>;
> > +
> > + trips {
> > + dsp_alert0: trip-point@0 {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > + dsp_crit: dsp_crit {
> > + temperature = <110000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + lpass-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens 2>;
> > +
> > + trips {
> > + lpass_alert0: trip-point@0 {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > + lpass_crit: lpass_crit {
> > + temperature = <110000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + wlan-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens 3>;
> > +
> > + trips {
> > + wlan_alert0: trip-point@0 {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > + wlan_crit: wlan_crit {
> > + temperature = <110000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cluster-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens 4>;
> > +
> > + trips {
> > + cluster_alert0: trip-point@0 {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > + cluster_crit: cluster_crit {
> > + temperature = <110000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > +
> > + cpu0-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens 5>;
> > +
> > + trips {
> > + cpu0_alert0: trip-point@0 {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > + cpu0_crit: cpu_crit {
> > + temperature = <110000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + cooling-maps {
> > + map0 {
> > + trip = <&cpu0_alert0>;
> > + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> > + };
> > + };
> > + };
> > +
> > + cpu1-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens 6>;
> > +
> > + trips {
> > + cpu1_alert0: trip-point@0 {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > + cpu1_crit: cpu_crit {
> > + temperature = <110000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + cooling-maps {
> > + map0 {
> > + trip = <&cpu1_alert0>;
> > + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> > + };
> > + };
> > + };
> > +
> > + cpu2-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens 7>;
> > +
> > + trips {
> > + cpu2_alert0: trip-point@0 {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > + cpu2_crit: cpu_crit {
> > + temperature = <110000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + cooling-maps {
> > + map0 {
> > + trip = <&cpu2_alert0>;
> > + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> > + };
> > + };
> > + };
> > +
> > + cpu3-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens 8>;
> > +
> > + trips {
> > + cpu3_alert0: trip-point@0 {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > + cpu3_crit: cpu_crit {
> > + temperature = <110000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + cooling-maps {
> > + map0 {
> > + trip = <&cpu3_alert0>;
> > + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> > + };
> > + };
> > + };
> > +
> > + gpu-thermal {
> > + polling-delay-passive = <250>;
> > + polling-delay = <1000>;
> > +
> > + thermal-sensors = <&tsens 9>;
> > +
> > + trips {
> > + gpu_alert0: trip-point@0 {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > + gpu_crit: gpu_crit {
> > + temperature = <95000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > + };
> > };
> > --
> > 2.17.1
> >
^ permalink raw reply [flat|nested] 7+ messages in thread