From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Baluta Subject: [PATCH v4 1/5] arm64: dts: imx8mq: Add SDMA nodes Date: Wed, 27 Feb 2019 06:38:09 +0000 Message-ID: <20190227063737.24445-2-daniel.baluta@nxp.com> References: <20190227063737.24445-1-daniel.baluta@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: <20190227063737.24445-1-daniel.baluta@nxp.com> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: "shawnguo@kernel.org" Cc: "S.j. Wang" , "angus@akkea.ca" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "s.hauer@pengutronix.de" , "kernel@pengutronix.de" , "festevam@gmail.com" , "l.stach@pengutronix.de" , Abel Vesa , "ccaione@baylibre.com" , "baruch@tkos.co.il" , "agx@sigxcpu.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , dl-linux-imx , Aisheng List-Id: devicetree@vger.kernel.org SDMA1 is part of AIPS-3 region and SDMA2 is part of AIPS-1 region. Signed-off-by: Anson Huang [initial submit in i.MX internal tree] Signed-off-by: Daniel Baluta [adaptation for linux-next] --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dt= s/freescale/imx8mq.dtsi index 9155bd4784eb..9d48450453fb 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -234,6 +234,17 @@ status =3D "disabled"; }; =20 + sdma2: sdma@302c0000 { + compatible =3D "fsl,imx8mq-sdma","fsl,imx7d-sdma"; + reg =3D <0x302c0000 0x10000>; + interrupts =3D ; + clocks =3D <&clk IMX8MQ_CLK_SDMA2_ROOT>, + <&clk IMX8MQ_CLK_SDMA2_ROOT>; + clock-names =3D "ipg", "ahb"; + #dma-cells =3D <3>; + fsl,sdma-ram-script-name =3D "imx/sdma/sdma-imx7d.bin"; + }; + iomuxc: iomuxc@30330000 { compatible =3D "fsl,imx8mq-iomuxc"; reg =3D <0x30330000 0x10000>; @@ -575,6 +586,17 @@ status =3D "disabled"; }; =20 + sdma1: sdma@30bd0000 { + compatible =3D "fsl, imx8mq-sdma","fsl,imx7d-sdma"; + reg =3D <0x30bd0000 0x10000>; + interrupts =3D ; + clocks =3D <&clk IMX8MQ_CLK_SDMA1_ROOT>, + <&clk IMX8MQ_CLK_SDMA1_ROOT>; + clock-names =3D "ipg", "ahb"; + #dma-cells =3D <3>; + fsl,sdma-ram-script-name =3D "imx/sdma/sdma-imx7d.bin"; + }; + fec1: ethernet@30be0000 { compatible =3D "fsl,imx8mq-fec", "fsl,imx6sx-fec"; reg =3D <0x30be0000 0x10000>; --=20 2.17.1