From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Baluta Subject: [PATCH v5 1/4] arm64: dts: imx8mq: Add SDMA nodes Date: Fri, 1 Mar 2019 16:36:32 +0000 Message-ID: <20190301163604.10618-2-daniel.baluta@nxp.com> References: <20190301163604.10618-1-daniel.baluta@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20190301163604.10618-1-daniel.baluta@nxp.com> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: "shawnguo@kernel.org" Cc: "mark.rutland@arm.com" , "devicetree@vger.kernel.org" , "baruch@tkos.co.il" , Anson Huang , Abel Vesa , "kuninori.morimoto.gx@renesas.com" , "ccaione@baylibre.com" , "spencercw@gmail.com" , "S.j. Wang" , "angus@akkea.ca" , "linux-kernel@vger.kernel.org" , Daniel Baluta , "robh+dt@kernel.org" , dl-linux-imx , "kernel@pengutronix.de" , Aisheng Dong , "agx@sigxcpu.org" , "festevam@gmail.com" , "s.hauer@pengutronix.de" , linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org SDMA1 is part of AIPS-3 region and SDMA2 is part of AIPS-1 region. Reviewed-by: Fabio Estevam Signed-off-by: Anson Huang [initial submit in i.MX internal tree] Signed-off-by: Daniel Baluta [adaptation for linux-next] --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 9155bd4784eb..9d48450453fb 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -234,6 +234,17 @@ status = "disabled"; }; + sdma2: sdma@302c0000 { + compatible = "fsl,imx8mq-sdma","fsl,imx7d-sdma"; + reg = <0x302c0000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>, + <&clk IMX8MQ_CLK_SDMA2_ROOT>; + clock-names = "ipg", "ahb"; + #dma-cells = <3>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; + }; + iomuxc: iomuxc@30330000 { compatible = "fsl,imx8mq-iomuxc"; reg = <0x30330000 0x10000>; @@ -575,6 +586,17 @@ status = "disabled"; }; + sdma1: sdma@30bd0000 { + compatible = "fsl,imx8mq-sdma","fsl,imx7d-sdma"; + reg = <0x30bd0000 0x10000>; + interrupts = ; + clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>, + <&clk IMX8MQ_CLK_SDMA1_ROOT>; + clock-names = "ipg", "ahb"; + #dma-cells = <3>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; + }; + fec1: ethernet@30be0000 { compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec"; reg = <0x30be0000 0x10000>; -- 2.17.1