[PATCH 0/2] spi: dw: Add support for an optional interface clock

[PATCH 0/2] spi: dw: Add support for an optional interface clock

[Gareth Williams]

The Synopsys SSI Controller has an interface clock that must be 
explicitly enabled in order to access the registers. This patch series
adds support for the interface clock and adds the associated bindings
documentation.

Phil Edworthy (2):
  dt: snps,dw-apb-ssi: Add clock bindings documentation
  spi: dw: Add support for an optional interface clock

 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt | 10 +++++++++-
 drivers/spi/spi-dw-mmio.c                                 | 12 ++++++++++++
 2 files changed, 21 insertions(+), 1 deletion(-)

-- 
2.7.4

[PATCH 1/2] dt: snps,dw-apb-ssi: Add clock bindings documentation

[Gareth Williams]

From: Phil Edworthy <phil.edworthy@renesas.com>

The driver requires a clock property, so detail it in the docs.
Fix a typo, 'pis' to 'pins'.
Add documentation for a separate, optional, interface clock.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Gareth Williams <gareth.williams.jx@renesas.com>
---
 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
index 2864bc6..7971193 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
@@ -8,9 +8,16 @@ Required properties:
 - interrupts : One interrupt, used by the controller.
 - #address-cells : <1>, as required by generic SPI binding.
 - #size-cells : <0>, also as required by generic SPI binding.
+- clocks : phandles for the clocks, see the description of clock-names below.
+   The phandle for the "ssi_clk" clock is required. The phandle for the "pclk"
+   clock is optional. If a single clock is specified but no clock-name, it is
+   the "ssi_clk" clock. If both clocks are listed, the "ssi_clk" must be first.
 
 Optional properties:
-- cs-gpios : Specifies the gpio pis to be used for chipselects.
+- clock-names : Contains the names of the clocks:
+    "ssi_clk", for the core clock used to generate the external SPI clock.
+    "pclk", the interface clock, required for register access.
+- cs-gpios : Specifies the gpio pins to be used for chipselects.
 - num-cs : The number of chipselects. If omitted, this will default to 4.
 - reg-io-width : The I/O register width (in bytes) implemented by this
   device.  Supported values are 2 or 4 (the default).
@@ -25,6 +32,7 @@ Example:
 		interrupts = <0 154 4>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+		clocks = <&spi_m_clk>;
 		num-cs = <2>;
 		cs-gpios = <&gpio0 13 0>,
 			   <&gpio0 14 0>;
-- 
2.7.4

Re: [PATCH 1/2] dt: snps,dw-apb-ssi: Add clock bindings documentation

[Mark Brown]

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On Thu, Feb 28, 2019 at 01:25:41PM +0000, Gareth Williams wrote:
> From: Phil Edworthy <phil.edworthy@renesas.com>
> 
> The driver requires a clock property, so detail it in the docs.
> Fix a typo, 'pis' to 'pins'.
> Add documentation for a separate, optional, interface clock.

Please use subject lines matching the style for the subsystem.  This
makes it easier for people to identify relevant patches.

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RE: [PATCH 1/2] dt: snps,dw-apb-ssi: Add clock bindings documentation

[Gareth Williams]

> On Sat, Mar 03, 2019 at 23:32 +0100, Mark Brown wrote:
> > On Thu, Feb 28, 2019 at 01:25:41PM +0000, Gareth Williams wrote:
> > From: Phil Edworthy <phil.edworthy@renesas.com>
> >
> > The driver requires a clock property, so detail it in the docs.
> > Fix a typo, 'pis' to 'pins'.
> > Add documentation for a separate, optional, interface clock.
> 
> Please use subject lines matching the style for the subsystem.  This makes it
> easier for people to identify relevant patches.

Thanks for the feedback Mark.
I will wait another week to see if there is any other feedback before sending an updated version of this patch series.