From: Maxime Ripard <maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
To: Chen-Yu Tsai <wens-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Srinivas Kandagatla
<srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 4/6] nvmem: sunxi_sid: Read out data in native format
Date: Mon, 18 Mar 2019 09:42:12 +0100 [thread overview]
Message-ID: <20190318084212.lv2lorskizl65uzg@flea> (raw)
In-Reply-To: <20190318073354.12151-5-wens-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 978 bytes --]
Hi,
On Mon, Mar 18, 2019 at 03:33:52PM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
>
> Originally the SID e-fuses were thought to be in big-endian format.
> Later sources show that they are in fact native or little-endian.
> The most compelling evidence is the thermal sensor calibration data,
> which is a set of one to three 16-bit values. In native-endian they
> are in 16-bit cells with increasing offsets, whereas with big-endian
> they are in the wrong order, and a gap with no data will show if there
> are one or three cells.
>
> Switch to a native endian representation for the nvmem device. For the
> H3, the register read-out method was already returning data in native
> endian. This only affects the other SoCs.
>
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
I thought only the newer SoCs were impacted by this issue?
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2019-03-18 8:42 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-18 7:33 [PATCH 0/6] nvmem: sunxi_sid: native format and A83T/H5 support Chen-Yu Tsai
[not found] ` <20190318073354.12151-1-wens-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2019-03-18 7:33 ` [PATCH 1/6] nvmem: sunxi_sid: Read out SID for randomness without looping Chen-Yu Tsai
2019-03-18 7:33 ` [PATCH 2/6] nvmem: sunxi_sid: Optimize register read-out method Chen-Yu Tsai
2019-03-18 7:33 ` [PATCH 3/6] nvmem: sunxi_sid: Dynamically allocate nvmem_config structure Chen-Yu Tsai
2019-03-18 7:33 ` [PATCH 4/6] nvmem: sunxi_sid: Read out data in native format Chen-Yu Tsai
[not found] ` <20190318073354.12151-5-wens-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2019-03-18 8:42 ` Maxime Ripard [this message]
2019-03-18 8:45 ` Chen-Yu Tsai
[not found] ` <CAGb2v67H9FkjKjSE5a7fUCb_t95Zfuk1p0bjWYJxjMqhMN-hfg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-03-18 8:57 ` Maxime Ripard
2019-03-18 9:09 ` Chen-Yu Tsai
[not found] ` <CAGb2v64pq5V0_nZ7f0ZPwuNxNU8HbY0A6CqeC6TMd2z2xhJHwg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-03-18 9:25 ` Maxime Ripard
2019-03-18 7:33 ` [PATCH 6/6] ARM: dts: sunxi: h3/h5: Add device node for SID Chen-Yu Tsai
2019-03-19 1:55 ` [linux-sunxi] " Samuel Holland
[not found] ` <8e9ef57f-1d24-b151-f8a4-812b7bb65388-RkNLwX/CsU9g9hUCZPvPmw@public.gmane.org>
2019-03-19 3:17 ` Chen-Yu Tsai
2019-03-18 7:33 ` [PATCH 5/6] nvmem: sunxi_sid: Support SID on A83T and H5 Chen-Yu Tsai
2019-03-20 14:25 ` [PATCH 0/6] nvmem: sunxi_sid: native format and A83T/H5 support Srinivas Kandagatla
2019-03-21 9:06 ` Chen-Yu Tsai
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