From mboxrd@z Thu Jan 1 00:00:00 1970 From: Atish Patra Subject: [RFT/RFC PATCH v3 5/5] RISC-V: Parse cpu topology during boot. Date: Wed, 20 Mar 2019 16:48:06 -0700 Message-ID: <20190320234806.19748-6-atish.patra@wdc.com> References: <20190320234806.19748-1-atish.patra@wdc.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20190320234806.19748-1-atish.patra@wdc.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+glpr-linux-riscv=m.gmane.org@lists.infradead.org To: linux-kernel@vger.kernel.org Cc: Mark Rutland , "Rafael J. Wysocki" , "Peter Zijlstra (Intel)" , Catalin Marinas , Palmer Dabbelt , Will Deacon , Atish Patra , linux-riscv@lists.infradead.org, Ingo Molnar , Dmitriy Cherkasov , Anup Patel , Morten Rasmussen , devicetree@vger.kernel.org, Albert Ou , Johan Hovold , Rob Herring , Paul Walmsley , Ard Biesheuvel , Greg Kroah-Hartman , Jeremy Linton , Otto Sabart , Sudeep Holla List-Id: devicetree@vger.kernel.org Currently, there are no topology defined for RISC-V. Parse the cpu-map node from device tree and setup the cpu topology. CPU topology after applying the patch. $cat /sys/devices/system/cpu/cpu2/topology/core_siblings_list 0-3 $cat /sys/devices/system/cpu/cpu3/topology/core_siblings_list 0-3 $cat /sys/devices/system/cpu/cpu3/topology/physical_package_id 0 $cat /sys/devices/system/cpu/cpu3/topology/core_id 3 Signed-off-by: Atish Patra --- arch/riscv/Kconfig | 1 + arch/riscv/kernel/smpboot.c | 3 +++ 2 files changed, 4 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index eb56c82d..ac87a0ec 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -47,6 +47,7 @@ config RISCV select PCI_MSI if PCI select RISCV_TIMER select GENERIC_IRQ_MULTI_HANDLER + select GENERIC_ARCH_TOPOLOGY if SMP select ARCH_HAS_PTE_SPECIAL select HAVE_EBPF_JIT if 64BIT diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index f41eb193..a8fe590c 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -16,6 +16,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -43,6 +44,7 @@ static DECLARE_COMPLETION(cpu_running); void __init smp_prepare_boot_cpu(void) { + init_cpu_topology(); } void __init smp_prepare_cpus(unsigned int max_cpus) @@ -146,6 +148,7 @@ asmlinkage void __init smp_callin(void) trap_init(); notify_cpu_starting(smp_processor_id()); + update_siblings_masks(smp_processor_id()); set_cpu_online(smp_processor_id(), 1); /* * Remote TLB flushes are ignored while the CPU is offline, so emit -- 2.21.0