[PATCH v3 0/1] ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs

[PATCH v3 0/1] ARM: dts: sun8i: a83t: Add missing cooling device properties for CPUs

[megous via linux-sunxi]

From: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>

(Part of the series was already applied, so this only contains the
remaining patch.)

This series adds some properties to prepare for passive cooling via
CPU frequency down-regulation, and fixes cpufreq for various CPU hotplug
situations.

#cooling-cells patch is not strictly necessary now, but now that SID
changes are soon to be merged, thermal sensor patches are likely to
follow, and it will be useful in short order, I expect.

Please take a look.

regards,
  Ondrej Jirman


Changes for v2:
- split the former single patch into a series
- reformulated descriptions to accommodate the split
Changes for v3:
- removed already applied patch
- re-ordered clock properties
- removed clock-names (not needed and not documented)

Ondrej Jirman (1):
  ARM: dts: sun8i: a83t: Add missing CPU clock references

 arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

-- 
2.21.0

[PATCH v3 1/1] ARM: dts: sun8i: a83t: Add missing CPU clock references

[megous via linux-sunxi]

From: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>

A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
We can bring down any CPU in the cluster, so we need to define clock
for each CPU, so that the system knows what clock to use if the first
CPU is down.

Also move the clocks property below the compatible on cpus where it is
already defined. Property "clock-names" is not needed.

Signed-off-by: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 7a40b7d77ec0..b241058dc6b0 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -61,10 +61,9 @@
 		#size-cells = <0>;
 
 		cpu0: cpu@0 {
-			clocks = <&ccu CLK_C0CPUX>;
-			clock-names = "cpu";
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
+			clocks = <&ccu CLK_C0CPUX>;
 			operating-points-v2 = <&cpu0_opp_table>;
 			cci-control-port = <&cci_control0>;
 			enable-method = "allwinner,sun8i-a83t-smp";
@@ -75,6 +74,7 @@
 		cpu@1 {
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
+			clocks = <&ccu CLK_C0CPUX>;
 			operating-points-v2 = <&cpu0_opp_table>;
 			cci-control-port = <&cci_control0>;
 			enable-method = "allwinner,sun8i-a83t-smp";
@@ -85,6 +85,7 @@
 		cpu@2 {
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
+			clocks = <&ccu CLK_C0CPUX>;
 			operating-points-v2 = <&cpu0_opp_table>;
 			cci-control-port = <&cci_control0>;
 			enable-method = "allwinner,sun8i-a83t-smp";
@@ -95,6 +96,7 @@
 		cpu@3 {
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
+			clocks = <&ccu CLK_C0CPUX>;
 			operating-points-v2 = <&cpu0_opp_table>;
 			cci-control-port = <&cci_control0>;
 			enable-method = "allwinner,sun8i-a83t-smp";
@@ -103,10 +105,9 @@
 		};
 
 		cpu100: cpu@100 {
-			clocks = <&ccu CLK_C1CPUX>;
-			clock-names = "cpu";
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
+			clocks = <&ccu CLK_C1CPUX>;
 			operating-points-v2 = <&cpu1_opp_table>;
 			cci-control-port = <&cci_control1>;
 			enable-method = "allwinner,sun8i-a83t-smp";
@@ -117,6 +118,7 @@
 		cpu@101 {
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
+			clocks = <&ccu CLK_C1CPUX>;
 			operating-points-v2 = <&cpu1_opp_table>;
 			cci-control-port = <&cci_control1>;
 			enable-method = "allwinner,sun8i-a83t-smp";
@@ -127,6 +129,7 @@
 		cpu@102 {
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
+			clocks = <&ccu CLK_C1CPUX>;
 			operating-points-v2 = <&cpu1_opp_table>;
 			cci-control-port = <&cci_control1>;
 			enable-method = "allwinner,sun8i-a83t-smp";
@@ -137,6 +140,7 @@
 		cpu@103 {
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
+			clocks = <&ccu CLK_C1CPUX>;
 			operating-points-v2 = <&cpu1_opp_table>;
 			cci-control-port = <&cci_control1>;
 			enable-method = "allwinner,sun8i-a83t-smp";
-- 
2.21.0

Re: [PATCH v3 1/1] ARM: dts: sun8i: a83t: Add missing CPU clock references

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 724 bytes --]

On Mon, Apr 01, 2019 at 03:36:10PM +0200, megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org wrote:
> From: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>
>
> A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
> We can bring down any CPU in the cluster, so we need to define clock
> for each CPU, so that the system knows what clock to use if the first
> CPU is down.
>
> Also move the clocks property below the compatible on cpus where it is
> already defined. Property "clock-names" is not needed.
>
> Signed-off-by: Ondrej Jirman <megous-5qf/QAjKc83QT0dZR+AlfA@public.gmane.org>

Applied, thanks!
Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com