From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Vignesh Raghavendra <vigneshr@ti.com>,
Tudor Ambarus <Tudor.Ambarus@microchip.com>,
Richard Weinberger <richard@nod.at>,
Marek Vasut <marek.vasut@gmail.com>, Chen-Yu Tsai <wens@csie.org>,
Rob Herring <robh+dt@kernel.org>,
linux-mtd@lists.infradead.org,
Brian Norris <computersforpeace@gmail.com>,
David Woodhouse <dwmw2@infradead.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/3] dt-bindings: mtd: sunxi: Add new compatible
Date: Fri, 5 Apr 2019 11:28:13 +0200 [thread overview]
Message-ID: <20190405112813.07d89534@xps13> (raw)
In-Reply-To: <20190405091302.mz3gox5jvoy3ygjr@flea>
[-- Attachment #1.1: Type: text/plain, Size: 2163 bytes --]
Hi Maxime,
Maxime Ripard <maxime.ripard@bootlin.com> wrote on Fri, 5 Apr 2019
11:13:02 +0200:
> Hi,
>
> On Thu, Apr 04, 2019 at 06:21:09PM +0200, Miquel Raynal wrote:
> > The A33 NAND controller is slightly different than the A10+ ones,
> > eg. DMA handling is a bit different and a few register offsets
> > changed.
> >
> > Introduce a new compatible to represent this version of the IP.
> >
> > Also append '-controller' to the new compatible (which is required for
> > new compatibles) as this is describing a NAND controller and not a
> > NAND chip.
>
> Out of curiosity, why are you requiring that suffix now?
Because people are confused with the terminology and we see people
mixing all the terms very often: NAND controller, NAND bus, NAND
chip, ECC engine, etc. This node only describes a NAND controller, so
let be more precise and stop naming everything just "NAND".
>
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > ---
> > Documentation/devicetree/bindings/mtd/sunxi-nand.txt | 7 ++++++-
> > 1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/mtd/sunxi-nand.txt b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt
> > index dcd5a5d80dc0..6128d41d8c59 100644
> > --- a/Documentation/devicetree/bindings/mtd/sunxi-nand.txt
> > +++ b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt
> > @@ -1,7 +1,12 @@
> > Allwinner NAND Flash Controller (NFC)
> >
> > Required properties:
> > -- compatible : "allwinner,sun4i-a10-nand".
> > +- compatible : Must be one of:
> > + - "allwinner,sun4i-a10-nand"
> > + - "allwinner,sun8i-a33-nand-controller"
> > + The former may be used by all IPs, however sun8i family
> > + will need the second one in order to make use of the
> > + internal DMA capabilities.
>
> I'm not sure we should have that statement. We have no idea whether or
> not this can be used by all IPs *today*, and we surely don't know
> about the one that are going to come out.
Shall I just drop the whole comment ("The former" ... "capabilities.")?
Thanks,
Miquèl
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next prev parent reply other threads:[~2019-04-05 9:28 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-04 16:21 [PATCH 0/3] Sun8i NAND DMA support Miquel Raynal
2019-04-04 16:21 ` [PATCH 1/3] dt-bindings: mtd: sunxi: Add new compatible Miquel Raynal
2019-04-05 9:13 ` Maxime Ripard
2019-04-05 9:28 ` Miquel Raynal [this message]
2019-04-05 9:56 ` Maxime Ripard
2019-04-04 16:21 ` [PATCH 2/3] mtd: rawnand: sunxi: Add DMA support for sun8i Miquel Raynal
2019-04-05 9:16 ` Maxime Ripard
2019-04-05 9:37 ` Miquel Raynal
2019-04-05 10:55 ` Maxime Ripard
2019-04-05 12:25 ` Miquel Raynal
2019-04-05 12:47 ` Maxime Ripard
2019-04-14 9:05 ` Boris Brezillon
2019-04-15 6:58 ` Miquel Raynal
2019-04-15 7:14 ` Boris Brezillon
2019-04-16 16:53 ` Miquel Raynal
2019-04-04 16:21 ` [PATCH 3/3] ARM: dts: sunxi: Improve sun8i NAND transfers by using DMA Miquel Raynal
2019-04-05 9:18 ` Maxime Ripard
2019-04-05 9:38 ` Miquel Raynal
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