From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from muru.com ([72.249.23.125]:44606 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726475AbfDFQmS (ORCPT ); Sat, 6 Apr 2019 12:42:18 -0400 Date: Sat, 6 Apr 2019 09:42:14 -0700 From: Tony Lindgren Subject: Re: [PATCH v2 1/6] ARM: dts: am33xx: Added macros for numeric pinmux addresses Message-ID: <20190406164214.GH49658@atomide.com> References: <20190314150524.GB19425@atomide.com> <20190402160949.14190-1-cquast@hanoverdisplays.com> <20190402160949.14190-2-cquast@hanoverdisplays.com> <5ca841f3.1c69fb81.e8386.644f@mx.google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Sender: devicetree-owner@vger.kernel.org To: Adam Ford Cc: Rob Herring , Christina Quast , Mark Rutland , devicetree , Benoit Cousson , Linux-OMAP , Russell King List-ID: Hi, * Adam Ford [190406 11:30]: > Is this something you want done for the omap3 as well? If this get's > pulled in for am33xx, I can work on doing it for omap3 unless someone > else already is. Sure.. There are few things to consider for omap3 though. The padconf modes are different between various SoC revisions. I think the base register range should be the same though. This can be checked in git history with something like: $ git show 195c7a52b76d:arch/arm/mach-omap2/mux34xx.c and $ git show 195c7a52b76d:arch/arm/mach-omap2/mux34xx.h So probably as long as we only define the register name, and not the mode names, we should be good to go. And making the macro use separate pinconf and mode values would make things easier eventually to switch to use #pinctrl-cells = <2> instead of <1> later on. Regards, Tony