From: Mark Brown <broonie@kernel.org>
To: Sowjanya Komatineni <skomatineni@nvidia.com>
Cc: thierry.reding@gmail.com, jonathanh@nvidia.com, talho@nvidia.com,
robh+dt@kernel.org, mark.rutland@arm.com, kyarlagadda@nvidia.com,
ldewangan@nvidia.com, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH V2 19/20] DT bindings: spi: document tx/rx clock delay properties
Date: Mon, 8 Apr 2019 14:22:11 +0700 [thread overview]
Message-ID: <20190408072211.GL2803@sirena.org.uk> (raw)
In-Reply-To: <1554423259-26056-19-git-send-email-skomatineni@nvidia.com>
[-- Attachment #1: Type: text/plain, Size: 310 bytes --]
On Thu, Apr 04, 2019 at 05:14:18PM -0700, Sowjanya Komatineni wrote:
> Tegra SPI controller has TX and RX trimmers to tuning the delay of
> SPI master clock with respect to the data.
Please use subject lines matching the style for the subsystem. This
makes it easier for people to identify relevant patches.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
next prev parent reply other threads:[~2019-04-08 7:22 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-05 0:14 [PATCH V2 01/20] spi: tegra114: fix PIO transfer Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 02/20] spi: tegra114: use unpacked mode for below 4 bytes Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 03/20] spi: tegra114: de-assert CS before SPI mode change Sowjanya Komatineni
2019-04-05 3:27 ` Applied "spi: tegra114: de-assert CS before SPI mode change" to the spi tree Mark Brown
2019-04-05 0:14 ` [PATCH V2 04/20] spi: tegra114: avoid reset call in atomic context Sowjanya Komatineni
2019-04-05 3:26 ` Applied "spi: tegra114: avoid reset call in atomic context" to the spi tree Mark Brown
2019-04-05 0:14 ` [PATCH V2 05/20] spi: tegra114: dump SPI registers during timeout Sowjanya Komatineni
2019-04-05 3:26 ` Applied "spi: tegra114: dump SPI registers during timeout" to the spi tree Mark Brown
2019-04-05 0:14 ` [PATCH V2 06/20] spi: tegra114: set supported bits per word Sowjanya Komatineni
2019-04-05 3:26 ` Applied "spi: tegra114: set supported bits per word" to the spi tree Mark Brown
2019-04-05 0:14 ` [PATCH V2 07/20] spi: tegra114: set bus number based on id Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 08/20] spi: tegra114: add dual mode support Sowjanya Komatineni
2019-04-08 7:32 ` Applied "spi: tegra114: add dual mode support" to the spi tree Mark Brown
2019-04-05 0:14 ` [PATCH V2 09/20] spi: tegra114: add 3 wire transfer mode support Sowjanya Komatineni
2019-04-08 7:31 ` Applied "spi: tegra114: add 3 wire transfer mode support" to the spi tree Mark Brown
2019-04-05 0:14 ` [PATCH V2 10/20] Documentation: devicetree: spi: add spi-lsbyte-first propery Sowjanya Komatineni
2019-04-08 6:27 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 11/20] spi: expand mode support and add LSBYTE_FIRST mode Sowjanya Komatineni
2019-04-08 6:28 ` Mark Brown
2019-04-11 19:58 ` Sowjanya Komatineni
2019-04-12 8:32 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 12/20] spi: tegra114: add support for LSBYTE_FIRST Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 13/20] spi: tegra114: add support for interrupt mask Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 14/20] spi: tegra114: add support for gpio based cs Sowjanya Komatineni
2019-04-08 6:30 ` Mark Brown
2019-04-05 0:14 ` [PATCH V2 15/20] spi: tegra114: add support for hw " Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 16/20] spi-summary: document set_cs_timing Sowjanya Komatineni
2019-04-08 7:31 ` Applied "spi-summary: document set_cs_timing" to the spi tree Mark Brown
2019-04-05 0:14 ` [PATCH V2 17/20] spi: add a method for configuring CS timing Sowjanya Komatineni
2019-04-08 7:31 ` Applied "spi: add a method for configuring CS timing" to the spi tree Mark Brown
2019-04-05 0:14 ` [PATCH V2 18/20] spi: tegra114: add support for HW CS timing Sowjanya Komatineni
2019-04-05 0:14 ` [PATCH V2 19/20] DT bindings: spi: document tx/rx clock delay properties Sowjanya Komatineni
2019-04-08 7:22 ` Mark Brown [this message]
2019-04-08 7:31 ` Applied "spi: document tx/rx clock delay properties" to the spi tree Mark Brown
2019-04-05 0:14 ` [PATCH V2 20/20] spi: tegra114: add support for tuning TX and RX trimmers Sowjanya Komatineni
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190408072211.GL2803@sirena.org.uk \
--to=broonie@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=kyarlagadda@nvidia.com \
--cc=ldewangan@nvidia.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=robh+dt@kernel.org \
--cc=skomatineni@nvidia.com \
--cc=talho@nvidia.com \
--cc=thierry.reding@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).