[PATCH 0/3] rockchip: A few clock cleanups for rk3288

[PATCH 0/3] rockchip: A few clock cleanups for rk3288

[Douglas Anderson]

This series contains a few misc clock cleanups for Rockchip rk3288
found by comparing to what's in the downstream Chrome OS 3.14 kernel.

NOTES:
* The PWM patches could go in separately from the revert but that
  would cause a merge conflict which is why they're together in a
  series.
* Having the PWM marked as a critical clock _definitely_ needs to land
  before switching the clock in the device tree.


Caesar Wang (1):
  ARM: dts: rockchip: fix PWM clock found on RK3288 Socs

Douglas Anderson (2):
  Revert "clk: rockchip: mark noc and some special clk as critical on
    rk3288"
  clk: rockchip: Make rkpwm a critical clock on rk3288

 arch/arm/boot/dts/rk3288.dtsi     |  8 ++++----
 drivers/clk/rockchip/clk-rk3288.c | 17 ++++++-----------
 2 files changed, 10 insertions(+), 15 deletions(-)

-- 
2.21.0.392.gf8f6787159e-goog

[PATCH 3/3] ARM: dts: rockchip: fix PWM clock found on RK3288 Socs

[Douglas Anderson]

From: Caesar Wang <caesar.wang@rock-chips.com>

We use the new PWM IP on RK3288, but the PWM's clock indeed incorrect.

Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---

 arch/arm/boot/dts/rk3288.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 8bce2fc49b24..efdfa3737561 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -677,7 +677,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pwm0_pin>;
-		clocks = <&cru PCLK_PWM>;
+		clocks = <&cru PCLK_RKPWM>;
 		clock-names = "pwm";
 		status = "disabled";
 	};
@@ -688,7 +688,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pwm1_pin>;
-		clocks = <&cru PCLK_PWM>;
+		clocks = <&cru PCLK_RKPWM>;
 		clock-names = "pwm";
 		status = "disabled";
 	};
@@ -699,7 +699,7 @@
 		#pwm-cells = <3>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pwm2_pin>;
-		clocks = <&cru PCLK_PWM>;
+		clocks = <&cru PCLK_RKPWM>;
 		clock-names = "pwm";
 		status = "disabled";
 	};
@@ -710,7 +710,7 @@
 		#pwm-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pwm3_pin>;
-		clocks = <&cru PCLK_PWM>;
+		clocks = <&cru PCLK_RKPWM>;
 		clock-names = "pwm";
 		status = "disabled";
 	};
-- 
2.21.0.392.gf8f6787159e-goog

Re: [PATCH 3/3] ARM: dts: rockchip: fix PWM clock found on RK3288 Socs

[Heiko Stübner]

Am Dienstag, 9. April 2019, 22:47:07 CEST schrieb Douglas Anderson:
> From: Caesar Wang <caesar.wang@rock-chips.com>
> 
> We use the new PWM IP on RK3288, but the PWM's clock indeed incorrect.
> 
> Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
> Signed-off-by: Douglas Anderson <dianders@chromium.org>

applied into a branch for 5._3_ ... as it requires a change coming
through a different tree, the patch gets a "quarantine"-release in
between.

Thanks
Heiko