From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v2 2/8] dt-bindings: gpu: add bus clock for Mali Midgard GPUs Date: Thu, 11 Apr 2019 14:30:55 +0200 Message-ID: <20190411123055.bpriih42puliuzoy@flea> References: <20190411105720.32357-1-peron.clem@gmail.com> <20190411105720.32357-3-peron.clem@gmail.com> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="myl2sgr6sgtdqgpt" Return-path: Content-Disposition: inline In-Reply-To: <20190411105720.32357-3-peron.clem@gmail.com> Sender: linux-kernel-owner@vger.kernel.org To: =?utf-8?B?Q2zDqW1lbnQgUMOpcm9u?= Cc: Rob Herring , Chen-Yu Tsai , Icenowy Zheng , Jagan Teki , Jernej Skrabec , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com List-Id: devicetree@vger.kernel.org --myl2sgr6sgtdqgpt Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Apr 11, 2019 at 12:57:14PM +0200, Cl=E9ment P=E9ron wrote: > Some SoCs adds a bus clock gate to the Mali Midgard GPU. > > Add the binding for the bus clock. > > Signed-off-by: Icenowy Zheng > Signed-off-by: Cl=E9ment P=E9ron I'm not quite sure what you did there. If Icenowy is the author and you're sending that commit on her behalf, then she should have the authorship of that commit. If you're the author of that commit, then we Icenowy's SoB is there? Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --myl2sgr6sgtdqgpt Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXK8zfwAKCRDj7w1vZxhR xZ4lAQDP9Q3j0RuJWlCZajpX5CwSRe8E84a7g5izuduy3bZfKwD9GB7qxlqthCzK nkf6aKAoGARkx8vi4MDpGUCwdyPQGQs= =8LHD -----END PGP SIGNATURE----- --myl2sgr6sgtdqgpt--