From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v2 2/6] ARM: dts: sun8i: v40: bananapi-m2-berry: Enable GMAC ethernet controller Date: Mon, 15 Apr 2019 09:53:09 +0200 Message-ID: <20190415075309.p7pgj62mmtmxsnnr@flea> References: <1555065186-8154-1-git-send-email-pgreco@centosproject.org> <1555065186-8154-3-git-send-email-pgreco@centosproject.org> Reply-To: maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="tjisfipvq5kg6xrt" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <1555065186-8154-3-git-send-email-pgreco-/kQrlZ55X3WoClj4AeEUq9i2O/JbrIOy@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Pablo Greco Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Rob Herring , Mark Rutland , Chen-Yu Tsai , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org --tjisfipvq5kg6xrt Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline On Fri, Apr 12, 2019 at 07:33:01AM -0300, Pablo Greco wrote: > Just like the Bananapi M2 Ultra, the Bananapi M2 Berry has a Realtek > RTL8211E RGMII PHY tied to the GMAC. > The PMIC's DC1SW output provides power for the PHY, while the ALDO2 > output provides I/O voltages on both sides. > > Signed-off-by: Pablo Greco > --- > arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 30 +++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts > index f05cabd..0d79e91 100644 > --- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts > +++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts > @@ -50,6 +50,7 @@ > compatible = "sinovoip,bpi-m2-berry", "allwinner,sun8i-r40"; > > aliases { > + ethernet0 = &gmac; > serial0 = &uart0; > }; > > @@ -92,6 +93,22 @@ > status = "okay"; > }; > > +&gmac { > + pinctrl-names = "default"; > + pinctrl-0 = <&gmac_rgmii_pins>; > + phy-handle = <&phy1>; > + phy-mode = "rgmii"; > + phy-supply = <®_dc1sw>; > + status = "okay"; > +}; > + > +&gmac_mdio { > + phy1: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + }; > +}; > + > &i2c0 { > status = "okay"; > > @@ -123,6 +140,13 @@ > status = "okay"; > }; > > +®_aldo2 { > + regulator-always-on; > + regulator-min-microvolt = <2500000>; > + regulator-max-microvolt = <2500000>; > + regulator-name = "vcc-pa"; > +}; > + If this one provides power to the pins, it should be tied to the PIO node. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --tjisfipvq5kg6xrt--