From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v2 2/6] ARM: dts: sun8i: v40: bananapi-m2-berry: Enable GMAC ethernet controller Date: Tue, 16 Apr 2019 15:00:57 +0200 Message-ID: <20190416130057.bjaweorywikaa6ig@flea> References: <1555065186-8154-1-git-send-email-pgreco@centosproject.org> <1555065186-8154-3-git-send-email-pgreco@centosproject.org> <20190415075309.p7pgj62mmtmxsnnr@flea> Reply-To: maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="2w42a2v2c5vbfesk" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Pablo =?utf-8?Q?Sebasti=C3=A1n?= Greco Cc: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Rob Herring , Mark Rutland , Chen-Yu Tsai , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org --2w42a2v2c5vbfesk Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline Content-Transfer-Encoding: quoted-printable 65;5600;1c On Tue, Apr 16, 2019 at 07:47:09AM -0300, Pablo Sebasti=C3=A1n Greco wrote: > > El 15/4/19 a las 04:53, Maxime Ripard escribi=C3=B3: > > On Fri, Apr 12, 2019 at 07:33:01AM -0300, Pablo Greco wrote: > > > Just like the Bananapi M2 Ultra, the Bananapi M2 Berry has a Realtek > > > RTL8211E RGMII PHY tied to the GMAC. > > > The PMIC's DC1SW output provides power for the PHY, while the ALDO2 > > > output provides I/O voltages on both sides. > > > > > > Signed-off-by: Pablo Greco > > > --- > > > arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 30 ++++++++++++= +++++++++++ > > > 1 file changed, 30 insertions(+) > > > > > > diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch= /arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts > > > index f05cabd..0d79e91 100644 > > > --- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts > > > +++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts > > > @@ -50,6 +50,7 @@ > > > compatible =3D "sinovoip,bpi-m2-berry", "allwinner,sun8i-r40"; > > > > > > aliases { > > > + ethernet0 =3D &gmac; > > > serial0 =3D &uart0; > > > }; > > > > > > @@ -92,6 +93,22 @@ > > > status =3D "okay"; > > > }; > > > > > > +&gmac { > > > + pinctrl-names =3D "default"; > > > + pinctrl-0 =3D <&gmac_rgmii_pins>; > > > + phy-handle =3D <&phy1>; > > > + phy-mode =3D "rgmii"; > > > + phy-supply =3D <®_dc1sw>; > > > + status =3D "okay"; > > > +}; > > > + > > > +&gmac_mdio { > > > + phy1: ethernet-phy@1 { > > > + compatible =3D "ethernet-phy-ieee802.3-c22"; > > > + reg =3D <1>; > > > + }; > > > +}; > > > + > > > &i2c0 { > > > status =3D "okay"; > > > > > > @@ -123,6 +140,13 @@ > > > status =3D "okay"; > > > }; > > > > > > +®_aldo2 { > > > + regulator-always-on; > > > + regulator-min-microvolt =3D <2500000>; > > > + regulator-max-microvolt =3D <2500000>; > > > + regulator-name =3D "vcc-pa"; > > > +}; > > > + > > If this one provides power to the pins, it should be tied to the PIO > > node. > > In that case, I should fix the bananapi-m2-ultra the same way. Do you pre= fer > me to add those fixes to this series? If you have that board, then please add that yep. > Or is it better to apply this like it is, and I fix both together in a > separated series? No, please resend a new version. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an e= mail to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. --2w42a2v2c5vbfesk Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXLXSCQAKCRDj7w1vZxhR xSSuAQCQ/kkSRgvp8XeaTQsZFfcjmgEBvvtjYDzpMrPJdVpClwD/Q3IuzuS0sWoE nYcAS9VzOQTUlt9QAbaD7EeaL/sdOQg= =0e9z -----END PGP SIGNATURE----- --2w42a2v2c5vbfesk--