From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH v2 4/6] dt-bindings: soc/fsl: qe: document new fsl,qe-snums binding Date: Wed, 1 May 2019 16:00:48 -0500 Message-ID: <20190501210048.GA20658@bogus> References: <20190430133615.25721-1-rasmus.villemoes@prevas.dk> <20190501092841.9026-1-rasmus.villemoes@prevas.dk> <20190501092841.9026-5-rasmus.villemoes@prevas.dk> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20190501092841.9026-5-rasmus.villemoes@prevas.dk> Sender: linux-kernel-owner@vger.kernel.org To: Rasmus Villemoes Cc: "devicetree@vger.kernel.org" , Qiang Zhao , Li Yang , "linuxppc-dev@lists.ozlabs.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Scott Wood , Christophe Leroy , Mark Rutland , Rasmus Villemoes List-Id: devicetree@vger.kernel.org On Wed, 1 May 2019 09:29:08 +0000, Rasmus Villemoes wrote: > Reading table 4-30, and its footnotes, of the QUICC Engine Block > Reference Manual shows that the set of snum _values_ is not > necessarily just a function of the _number_ of snums, as given in the > fsl,qe-num-snums property. > > As an alternative, to make it easier to add support for other variants > of the QUICC engine IP, this introduces a new binding fsl,qe-snums, > which automatically encodes both the number of snums and the actual > values to use. > > For example, for the MPC8309, one would specify the property as > > fsl,qe-snums = /bits/ 8 < > 0x88 0x89 0x98 0x99 0xa8 0xa9 0xb8 0xb9 > 0xc8 0xc9 0xd8 0xd9 0xe8 0xe9>; > > Signed-off-by: Rasmus Villemoes > --- > Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe.txt | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > Reviewed-by: Rob Herring