From mboxrd@z Thu Jan 1 00:00:00 1970 From: Leo Yan Subject: [PATCH v2 07/11] arm64: dts: hi6220: Update coresight DT bindings Date: Wed, 8 May 2019 10:18:58 +0800 Message-ID: <20190508021902.10358-8-leo.yan@linaro.org> References: <20190508021902.10358-1-leo.yan@linaro.org> Return-path: In-Reply-To: <20190508021902.10358-1-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org To: Rob Herring , Mark Rutland , Suzuki K Poulose , Mathieu Poirier , Mike Leach , Wei Xu , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Andy Gross , David Brown , Linus Walleij , Liviu Dudau , Sudeep Holla , Lorenzo Pieralisi , Orson Zhai , Baolin Wang , Chunyan Zhang Cc: Leo Yan , Guodong Xu , Zhangfei Gao , Haojian Zhuang List-Id: devicetree@vger.kernel.org CoreSight DT bindings have been updated, thus the old compatible strings are obsolete and the drivers will report warning if DTS uses these obsolete strings. This patch switches to the new bindings for CoreSight dynamic funnel and static replicator, so can dismiss warning during initialisation. Cc: Wei Xu Cc: Guodong Xu Cc: Zhangfei Gao Cc: Haojian Zhuang Cc: Mathieu Poirier Cc: Suzuki K Poulose Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi index 68c52f1149be..5a34217d823a 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi @@ -15,7 +15,7 @@ / { soc { funnel@f6401000 { - compatible = "arm,coresight-funnel", "arm,primecell"; + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; reg = <0 0xf6401000 0 0x1000>; clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; clock-names = "apb_pclk"; @@ -65,7 +65,7 @@ }; replicator { - compatible = "arm,coresight-replicator"; + compatible = "arm,coresight-static-replicator"; clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; clock-names = "apb_pclk"; @@ -133,7 +133,7 @@ }; funnel@f6501000 { - compatible = "arm,coresight-funnel", "arm,primecell"; + compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; reg = <0 0xf6501000 0 0x1000>; clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>; clock-names = "apb_pclk"; -- 2.17.1