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Date: Thu, 9 May 2019 16:21:49 +0200
From: Thierry Reding <thierry.reding@gmail.com>
Subject: Re: [PATCH V2 14/28] PCI: tegra: Add SW fixup for RAW violations
Message-ID: <20190509142149.GK8907@ulmo>
References: <20190423092825.759-1-mmaddireddy@nvidia.com>
 <20190423092825.759-15-mmaddireddy@nvidia.com>
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In-Reply-To: <20190423092825.759-15-mmaddireddy@nvidia.com>
To: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Cc: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, jonathanh@nvidia.com, lorenzo.pieralisi@arm.com, vidyas@nvidia.com, linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org
List-ID: <devicetree@vger.kernel.org>


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On Tue, Apr 23, 2019 at 02:58:11PM +0530, Manikanta Maddireddy wrote:
> The logic which blocks read requests till AFI gets ACK for all outstanding
> writes from memory controller does not behave correctly when number of
> outstanding writes become more than 32 in Tegra124 and Tegra132.
>=20
> SW fixup is to prevent writes from accumulating more than 32 by,
>  - limiting outstanding posted writes to 14
>  - modifying Gen1 and Gen2 UpdateFC timer frequency
>=20
> UpdateFC timer frequency is equal to twice the value of register content
> in nsec. These settings are recommended after stress testing with differe=
nt
> values.
>=20
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> ---
> V2: Changed update_fc_val to update_fc_threshold
>=20
>  drivers/pci/controller/pci-tegra.c | 34 ++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)

Acked-by: Thierry Reding <treding@nvidia.com>

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