From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joseph Lo Subject: [PATCH V4 8/8] arm64: tegra: Add external memory controller node for Tegra210 Date: Wed, 29 May 2019 16:21:39 +0800 Message-ID: <20190529082139.5581-9-josephl@nvidia.com> References: <20190529082139.5581-1-josephl@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20190529082139.5581-1-josephl@nvidia.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Thierry Reding , Peter De Schrijver , Jonathan Hunter , Rob Herring , Stephen Boyd Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Joseph Lo List-Id: devicetree@vger.kernel.org Add external memory controller (EMC) node for Tegra210 Signed-off-by: Joseph Lo --- v4: - no change. v3: - apply memory-region for emc_table. And add reserved-memory node with it. --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 33 ++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index bc71ef8f9a09..b9ccfee39ed2 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -872,6 +872,27 @@ #iommu-cells = <1>; }; + external-memory-controller@7001b000 { + compatible = "nvidia,tegra210-emc"; + reg = <0x0 0x7001b000 0x0 0x1000>, + <0x0 0x7001e000 0x0 0x1000>, + <0x0 0x7001f000 0x0 0x1000>; + clocks = <&tegra_car TEGRA210_CLK_EMC>, + <&tegra_car TEGRA210_CLK_PLL_M>, + <&tegra_car TEGRA210_CLK_PLL_C>, + <&tegra_car TEGRA210_CLK_PLL_P>, + <&tegra_car TEGRA210_CLK_CLK_M>, + <&tegra_car TEGRA210_CLK_PLL_M_UD>, + <&tegra_car TEGRA210_CLK_PLL_MB_UD>, + <&tegra_car TEGRA210_CLK_PLL_MB>, + <&tegra_car TEGRA210_CLK_PLL_P_UD>; + clock-names = "emc", "pll_m", "pll_c", "pll_p", "clk_m", + "pll_m_ud", "pll_mb_ud", "pll_mb", "pll_p_ud"; + interrupts = ; + memory-region = <&emc_table>; + nvidia,memory-controller = <&mc>; + }; + sata@70020000 { compatible = "nvidia,tegra210-ahci"; reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ @@ -1431,6 +1452,18 @@ }; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + emc_table: emc-table@8be00000 { + compatible = "nvidia,tegra210-emc-table"; + reg = <0x0 0x8be00000 0x0 0x10000>; + status = "disabled"; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts =