From mboxrd@z Thu Jan 1 00:00:00 1970 From: Anson.Huang@nxp.com Subject: [PATCH] arm64: dts: imx8mm: Move gic node into soc node Date: Mon, 3 Jun 2019 09:50:20 +0800 Message-ID: <20190603015020.41410-1-Anson.Huang@nxp.com> Return-path: Sender: linux-kernel-owner@vger.kernel.org To: robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, leonard.crestez@nxp.com, aisheng.dong@nxp.com, viresh.kumar@linaro.org, ping.bai@nxp.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Linux-imx@nxp.com List-Id: devicetree@vger.kernel.org From: Anson Huang GIC is inside of SoC from architecture perspective, it should be located inside of soc node in DT. Signed-off-by: Anson Huang --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index dc99f45..429312e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -169,15 +169,6 @@ clock-output-names = "clk_ext4"; }; - gic: interrupt-controller@38800000 { - compatible = "arm,gic-v3"; - reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */ - <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */ - #interrupt-cells = <3>; - interrupt-controller; - interrupts = ; - }; - psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -739,6 +730,15 @@ dma-names = "rx-tx"; status = "disabled"; }; + + gic: interrupt-controller@38800000 { + compatible = "arm,gic-v3"; + reg = <0x38800000 0x10000>, /* GIC Dist */ + <0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */ + #interrupt-cells = <3>; + interrupt-controller; + interrupts = ; + }; }; usbphynop1: usbphynop1 { -- 2.7.4