* [PATCH v10 1/7] dt-bindings: Add a binding for Mediatek SCP
2019-06-03 3:45 [PATCH v10 0/7] Add support for mt8183 SCP Pi-Hsun Shih
@ 2019-06-03 3:45 ` Pi-Hsun Shih
2019-06-03 3:45 ` [PATCH v10 5/7] dt-bindings: Add binding for cros-ec-rpmsg Pi-Hsun Shih
2019-06-03 3:45 ` [PATCH v10 7/7] arm64: dts: mt8183: add scp node Pi-Hsun Shih
2 siblings, 0 replies; 5+ messages in thread
From: Pi-Hsun Shih @ 2019-06-03 3:45 UTC (permalink / raw)
Cc: Ohad Ben-Cohen, Rob Herring,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Erin Lo, open list:REMOTE PROCESSOR REMOTEPROC SUBSYSTEM,
open list, Bjorn Andersson, Rob Herring,
moderated list:ARM/Mediatek SoC support, Pi-Hsun Shih,
Matthias Brugger, Mark Rutland,
moderated list:ARM/Mediatek SoC support
From: Erin Lo <erin.lo@mediatek.com>
Add a DT binding documentation of SCP for the
MT8183 SoC from Mediatek.
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changes from v9, v8, v7, v6:
- No change.
Changes from v5:
- Remove dependency on CONFIG_RPMSG_MTK_SCP.
Changes from v4:
- Add detail of more properties.
- Document the usage of mtk,rpmsg-name in subnode from the new design.
Changes from v3:
- No change.
Changes from v2:
- No change. I realized that for this patch series, there's no need to
add anything under the mt8183-scp node (neither the mt8183-rpmsg or
the cros-ec-rpmsg) for them to work, since mt8183-rpmsg is added
directly as a rproc_subdev by code, and cros-ec-rpmsg is dynamically
created by SCP name service.
Changes from v1:
- No change.
---
.../bindings/remoteproc/mtk,scp.txt | 36 +++++++++++++++++++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/mtk,scp.txt
diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt b/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt
new file mode 100644
index 000000000000..3ba668bab14b
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/mtk,scp.txt
@@ -0,0 +1,36 @@
+Mediatek SCP Bindings
+----------------------------------------
+
+This binding provides support for ARM Cortex M4 Co-processor found on some
+Mediatek SoCs.
+
+Required properties:
+- compatible Should be "mediatek,mt8183-scp"
+- reg Should contain the address ranges for the two memory
+ regions, SRAM and CFG.
+- reg-names Contains the corresponding names for the two memory
+ regions. These should be named "sram" & "cfg".
+- clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
+- clock-names Contains the corresponding name for the clock. This
+ should be named "main".
+
+Subnodes
+--------
+
+Subnodes of the SCP represent rpmsg devices. The names of the devices are not
+important. The properties of these nodes are defined by the individual bindings
+for the rpmsg devices - but must contain the following property:
+
+- mtk,rpmsg-name Contains the name for the rpmsg device. Used to match
+ the subnode to rpmsg device announced by SCP.
+
+Example:
+
+ scp: scp@10500000 {
+ compatible = "mediatek,mt8183-scp";
+ reg = <0 0x10500000 0 0x80000>,
+ <0 0x105c0000 0 0x5000>;
+ reg-names = "sram", "cfg";
+ clocks = <&infracfg CLK_INFRA_SCPSYS>;
+ clock-names = "main";
+ };
--
2.22.0.rc1.257.g3120a18244-goog
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v10 5/7] dt-bindings: Add binding for cros-ec-rpmsg.
2019-06-03 3:45 [PATCH v10 0/7] Add support for mt8183 SCP Pi-Hsun Shih
2019-06-03 3:45 ` [PATCH v10 1/7] dt-bindings: Add a binding for Mediatek SCP Pi-Hsun Shih
@ 2019-06-03 3:45 ` Pi-Hsun Shih
2019-06-12 8:40 ` Lee Jones
2019-06-03 3:45 ` [PATCH v10 7/7] arm64: dts: mt8183: add scp node Pi-Hsun Shih
2 siblings, 1 reply; 5+ messages in thread
From: Pi-Hsun Shih @ 2019-06-03 3:45 UTC (permalink / raw)
Cc: Pi-Hsun Shih, Rob Herring, Lee Jones, Rob Herring, Mark Rutland,
Benson Leung, Enric Balletbo i Serra, Guenter Roeck,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
Add a DT binding documentation for ChromeOS EC driver over rpmsg.
Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
---
Changes from v9, v8, v7, v6:
- No change.
Changes from v5:
- New patch.
---
Documentation/devicetree/bindings/mfd/cros-ec.txt | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/cros-ec.txt b/Documentation/devicetree/bindings/mfd/cros-ec.txt
index 6245c9b1a68b..4860eabd0f72 100644
--- a/Documentation/devicetree/bindings/mfd/cros-ec.txt
+++ b/Documentation/devicetree/bindings/mfd/cros-ec.txt
@@ -3,7 +3,7 @@ ChromeOS Embedded Controller
Google's ChromeOS EC is a Cortex-M device which talks to the AP and
implements various function such as keyboard and battery charging.
-The EC can be connect through various means (I2C, SPI, LPC) and the
+The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the
compatible string used depends on the interface. Each connection method has
its own driver which connects to the top level interface-agnostic EC driver.
Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to
@@ -17,6 +17,9 @@ Required properties (SPI):
- compatible: "google,cros-ec-spi"
- reg: SPI chip select
+Required properties (RPMSG):
+- compatible: "google,cros-ec-rpmsg"
+
Optional properties (SPI):
- google,cros-ec-spi-pre-delay: Some implementations of the EC need a little
time to wake up from sleep before they can receive SPI transfers at a high
--
2.22.0.rc1.257.g3120a18244-goog
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v10 5/7] dt-bindings: Add binding for cros-ec-rpmsg.
2019-06-03 3:45 ` [PATCH v10 5/7] dt-bindings: Add binding for cros-ec-rpmsg Pi-Hsun Shih
@ 2019-06-12 8:40 ` Lee Jones
0 siblings, 0 replies; 5+ messages in thread
From: Lee Jones @ 2019-06-12 8:40 UTC (permalink / raw)
To: Pi-Hsun Shih
Cc: Rob Herring, Rob Herring, Mark Rutland, Benson Leung,
Enric Balletbo i Serra, Guenter Roeck,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
open list
On Mon, 03 Jun 2019, Pi-Hsun Shih wrote:
> Add a DT binding documentation for ChromeOS EC driver over rpmsg.
>
> Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
> Changes from v9, v8, v7, v6:
> - No change.
>
> Changes from v5:
> - New patch.
> ---
> Documentation/devicetree/bindings/mfd/cros-ec.txt | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
Applied, thanks.
--
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v10 7/7] arm64: dts: mt8183: add scp node
2019-06-03 3:45 [PATCH v10 0/7] Add support for mt8183 SCP Pi-Hsun Shih
2019-06-03 3:45 ` [PATCH v10 1/7] dt-bindings: Add a binding for Mediatek SCP Pi-Hsun Shih
2019-06-03 3:45 ` [PATCH v10 5/7] dt-bindings: Add binding for cros-ec-rpmsg Pi-Hsun Shih
@ 2019-06-03 3:45 ` Pi-Hsun Shih
2 siblings, 0 replies; 5+ messages in thread
From: Pi-Hsun Shih @ 2019-06-03 3:45 UTC (permalink / raw)
Cc: Pi-Hsun Shih, Eddie Huang, Erin Lo, Rob Herring, Mark Rutland,
Matthias Brugger,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/Mediatek SoC support,
moderated list:ARM/Mediatek SoC support, open list
From: Eddie Huang <eddie.huang@mediatek.com>
Add scp node to mt8183 and mt8183-evb
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
---
Changes from v9:
- Remove extra reserve-memory-vpu_share node.
Changes from v8:
- New patch.
---
arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 11 +++++++++++
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 12 ++++++++++++
2 files changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
index d8e555cbb5d3..e46e34ce3159 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
@@ -24,6 +24,17 @@
chosen {
stdout-path = "serial0:921600n8";
};
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ scp_mem_reserved: scp_mem_region {
+ compatible = "shared-dma-pool";
+ reg = <0 0x50000000 0 0x2900000>;
+ no-map;
+ };
+ };
};
&auxadc {
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index c2749c4631bc..133146b52904 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -254,6 +254,18 @@
clock-names = "spi", "wrap";
};
+ scp: scp@10500000 {
+ compatible = "mediatek,mt8183-scp";
+ reg = <0 0x10500000 0 0x80000>,
+ <0 0x105c0000 0 0x5000>;
+ reg-names = "sram", "cfg";
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg CLK_INFRA_SCPSYS>;
+ clock-names = "main";
+ memory-region = <&scp_mem_reserved>;
+ status = "disabled";
+ };
+
auxadc: auxadc@11001000 {
compatible = "mediatek,mt8183-auxadc",
"mediatek,mt8173-auxadc";
--
2.22.0.rc1.257.g3120a18244-goog
^ permalink raw reply related [flat|nested] 5+ messages in thread