[PATCH 0/4] Enhance Thermal support

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* [PATCH 0/4] Enhance Thermal support
@ 2019-06-12 14:20 Biju Das
  2019-06-12 14:20 ` [PATCH 1/4] arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC Biju Das
                   ` (4 more replies)
  0 siblings, 5 replies; 7+ messages in thread
From: Biju Das @ 2019-06-12 14:20 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland
  Cc: Biju Das, Simon Horman, Magnus Damm, linux-renesas-soc,
	devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro

This series aims to enhance thermal support by adding cpu-map,
capacity-dmips-mhz,thermal zone to support IPA and also adding 
dynamic power coefficients.

For CPU capacity-dmips-mhz calculation
-------------------------------------
dhrystone cross complied using the command [1].
[1] $CC -O3 -DTIME -fno-inline -fno-builtin-printf -Wno-implicit -march=armv8-a dhry_1.c dhry_2.c -o exe-dry

dhrystone is executed(with a loop value of 80000000) and took the average value for 5 iterations
of CA57 and CA53.

IPA testing
----------

1)Enable THERMAL_WRITABLE_TRIPS and THERMAL_STATISTICS in kernel

2) Check the current  temperature(36.5 C) and check the cooling stats on device0 and device 1

Execute the below applications on an ssh session

3) while true; do touch pic-`date +%s`.jpg;done &  will give almost 0.5 C jump on each instance

4) Executing dhrystone will give 3-4 C jump(runs through the benchmark: 800000000)

5) Now the current temperature is around 46.0 C and there is no change in cooling stats on device0 and device 1

6) Now change the passive trip temperature to 42 C, At this time CPUFreq started kicking in trying to limit the temperature, which you can see through the cooling stats on device0 and device1. You can see the system trying to maintain the temperature around 42 C.

7)  Without changing the load, Now change  the passive trip temperature to 100 C, the temperature rises back to 46 C again.

logs
----
2)
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
36500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/cdev0/stats/trans_table
 From  :    To
       : state 0  state 1  state 2
state 0:       0        0        0
state 1:       0        0        0
state 2:       0        0        0
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/cdev1/stats/trans_table
 From  :    To
       : state 0  state 1  state 2
state 0:       0        0        0
state 1:       0        0        0
state 2:       0        0        0
3)
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
38500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
39000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
40000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
38500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
40500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
41000
root@hihope-rz-g2m:~#  cat /sys/class/thermal/thermal_zone2/temp
41500
root@hihope-rz-g2m:~#  cat /sys/class/thermal/thermal_zone2/temp
41500
4)
root@hihope-rz-g2m:~#  cat /sys/class/thermal/thermal_zone2/temp
44500
5)
root@hihope-rz-g2m:~#  cat /sys/class/thermal/thermal_zone2/temp
46000
root@hihope-rz-g2m:~#  cat /sys/class/thermal/thermal_zone2/temp
46500
root@hihope-rz-g2m:~#  cat /sys/class/thermal/thermal_zone2/temp
46500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/cdev1/stats/trans_table
 From  :    To
       : state 0  state 1  state 2
state 0:       0        0        0
state 1:       0        0        0
state 2:       0        0        0
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/cdev1/stats/trans_table
 From  :    To
       : state 0  state 1  state 2
state 0:       0        0        0
state 1:       0        0        0
state 2:       0        0        0

6)
root@hihope-rz-g2m:~# echo 42000 > /sys/class/thermal/thermal_zone2/trip_point_0_temp
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
43000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
43000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
43000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
43000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
43000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
43000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/cdev1/stats/trans_table
 From  :    To
       : state 0  state 1  state 2
state 0:       0        1        0
state 1:       0        0        1
state 2:       0        0        0
root@hihope-rz-g2m:~#  cat /sys/class/thermal/thermal_zone2/cdev0/stats/trans_table
 From  :    To
       : state 0  state 1  state 2
state 0:       0        1        0
state 1:       0        0        1
state 2:       0        0        0
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
41500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
41500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~#  cat /sys/class/thermal/thermal_zone2/cdev0/stats/trans_table
 From  :    To
       : state 0  state 1  state 2
state 0:       0        3        0
state 1:       2        0       50
state 2:       0       49        0
root@hihope-rz-g2m:~#  cat /sys/class/thermal/thermal_zone2/cdev1/stats/trans_table
 From  :    To
       : state 0  state 1  state 2
state 0:       0        3        0
state 1:       2        0       52
state 2:       0       51        0
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
41500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
41500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
41500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
42000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
41500

7)
root@hihope-rz-g2m:~# echo 100000 > /sys/class/thermal/thermal_zone2/trip_point_0_temp
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
45000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
45500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
44500
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
46000
root@hihope-rz-g2m:~# cat /sys/class/thermal/thermal_zone2/temp
45500
root@hihope-rz-g2m:~#

Biju Das (4):
  arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC
  arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz
  arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA
  arm64: dts: renesas: r8a774a1: Add dynamic power coefficient

 arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 59 ++++++++++++++++++++++++++++++-
 1 file changed, 58 insertions(+), 1 deletion(-)

-- 
2.7.4

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 1/4] arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC
  2019-06-12 14:20 [PATCH 0/4] Enhance Thermal support Biju Das
@ 2019-06-12 14:20 ` Biju Das
  2019-06-12 14:20 ` [PATCH 2/4] arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz Biju Das
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 7+ messages in thread
From: Biju Das @ 2019-06-12 14:20 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland
  Cc: Biju Das, Simon Horman, Magnus Damm, linux-renesas-soc,
	devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro

This patch adds the "cpu-map" into r8a774a1 composed of multi-cluster. This
definition is used to parse the cpu topology.

Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> for r8a7796 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 4b1332f..e6ea5a1 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -102,6 +102,32 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&a57_0>;
+				};
+				core1 {
+					cpu = <&a57_1>;
+				};
+			};
+
+			cluster1 {
+				core0 {
+					cpu = <&a53_0>;
+				};
+				core1 {
+					cpu = <&a53_1>;
+				};
+				core2 {
+					cpu = <&a53_2>;
+				};
+				core3 {
+					cpu = <&a53_3>;
+				};
+			};
+		};
+
 		a57_0: cpu@0 {
 			compatible = "arm,cortex-a57";
 			reg = <0x0>;
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH 2/4] arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz
  2019-06-12 14:20 [PATCH 0/4] Enhance Thermal support Biju Das
  2019-06-12 14:20 ` [PATCH 1/4] arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC Biju Das
@ 2019-06-12 14:20 ` Biju Das
  2019-06-12 14:20 ` [PATCH 3/4] arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA Biju Das
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 7+ messages in thread
From: Biju Das @ 2019-06-12 14:20 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland
  Cc: Biju Das, Simon Horman, Magnus Damm, linux-renesas-soc,
	devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro

Set the capacity-dmips-mhz for RZ/G2M(r8a774a1) SoC, that is based on
dhrystone.

Based on work done by Gaku Inami <gaku.inami.xw@bp.renesas.com> for
r8a7796 SoC.

The average dhrystone result for 5 iterations is as below:

r8a774a1 SoC (CA57x2 + CA53x4)
  CPU   max-freq   dhrystone
  ---------------------------------
  CA57   1500 MHz  11428571 lps/s
  CA53   1200 MHz   5000000 lps/s

>From this, CPU capacity-dmips-mhz for CA57 and CA53 are calculated
as follows:

r8a774a1 SoC
  CA57 : 1024 / (11428571 / 1500) * (11428571 / 1500) = 1024
  CA53 : 1024 / (11428571 / 1500) * ( 5000000 / 1200) =  560

Since each CPUs have different max frequencies, the final CPU
capacities of A53 scaled by the above difference is as below

$ cat /sys/devices/system/cpu/cpu*/cpu_capacity
1024
1024
448
448
448
448

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index e6ea5a1..603cfdb 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -137,6 +137,7 @@
 			enable-method = "psci";
 			clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
 			operating-points-v2 = <&cluster0_opp>;
+			capacity-dmips-mhz = <1024>;
 		};
 
 		a57_1: cpu@1 {
@@ -148,6 +149,7 @@
 			enable-method = "psci";
 			clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
 			operating-points-v2 = <&cluster0_opp>;
+			capacity-dmips-mhz = <1024>;
 		};
 
 		a53_0: cpu@100 {
@@ -159,6 +161,7 @@
 			enable-method = "psci";
 			clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
+			capacity-dmips-mhz = <560>;
 		};
 
 		a53_1: cpu@101 {
@@ -170,6 +173,7 @@
 			enable-method = "psci";
 			clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
+			capacity-dmips-mhz = <560>;
 		};
 
 		a53_2: cpu@102 {
@@ -181,6 +185,7 @@
 			enable-method = "psci";
 			clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
+			capacity-dmips-mhz = <560>;
 		};
 
 		a53_3: cpu@103 {
@@ -192,6 +197,7 @@
 			enable-method = "psci";
 			clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
+			capacity-dmips-mhz = <560>;
 		};
 
 		L2_CA57: cache-controller-0 {
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH 3/4] arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA
  2019-06-12 14:20 [PATCH 0/4] Enhance Thermal support Biju Das
  2019-06-12 14:20 ` [PATCH 1/4] arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC Biju Das
  2019-06-12 14:20 ` [PATCH 2/4] arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz Biju Das
@ 2019-06-12 14:20 ` Biju Das
  2019-06-12 14:20 ` [PATCH 4/4] arm64: dts: renesas: r8a774a1: Add dynamic power coefficient Biju Das
  2019-06-17  8:27 ` [PATCH 0/4] Enhance Thermal support Simon Horman
  4 siblings, 0 replies; 7+ messages in thread
From: Biju Das @ 2019-06-12 14:20 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland
  Cc: Biju Das, Simon Horman, Magnus Damm, linux-renesas-soc,
	devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro

Setup a thermal zone driven by SoC temperature sensor. Create passive trip
points and bind them to CPUFreq cooling device that supports power
extension.

Based on work by Dien Pham <dien.pham.ry@renesas.com> for r8a7796 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 603cfdb..6f52451 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -138,6 +138,7 @@
 			clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
 			operating-points-v2 = <&cluster0_opp>;
 			capacity-dmips-mhz = <1024>;
+			#cooling-cells = <2>;
 		};
 
 		a57_1: cpu@1 {
@@ -150,6 +151,7 @@
 			clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
 			operating-points-v2 = <&cluster0_opp>;
 			capacity-dmips-mhz = <1024>;
+			#cooling-cells = <2>;
 		};
 
 		a53_0: cpu@100 {
@@ -159,6 +161,7 @@
 			power-domains = <&sysc R8A774A1_PD_CA53_CPU0>;
 			next-level-cache = <&L2_CA53>;
 			enable-method = "psci";
+			#cooling-cells = <2>;
 			clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
 			capacity-dmips-mhz = <560>;
@@ -2248,6 +2251,7 @@
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
 			thermal-sensors = <&tsc 0>;
+			sustainable-power = <3874>;
 
 			trips {
 				sensor1_crit: sensor1-crit {
@@ -2262,6 +2266,7 @@
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
 			thermal-sensors = <&tsc 1>;
+			sustainable-power = <3874>;
 
 			trips {
 				sensor2_crit: sensor2-crit {
@@ -2270,21 +2275,39 @@
 					type = "critical";
 				};
 			};
-
 		};
 
 		sensor_thermal3: sensor-thermal3 {
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
 			thermal-sensors = <&tsc 2>;
+			sustainable-power = <3874>;
 
 			trips {
+				target: trip-point1 {
+					temperature = <100000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+
 				sensor3_crit: sensor3-crit {
 					temperature = <120000>;
 					hysteresis = <1000>;
 					type = "critical";
 				};
 			};
+			cooling-maps {
+				map0 {
+					trip = <&target>;
+					cooling-device = <&a57_0 0 2>;
+					contribution = <1024>;
+				};
+				map1 {
+					trip = <&target>;
+					cooling-device = <&a53_0 0 2>;
+					contribution = <1024>;
+				};
+			};
 		};
 	};
 
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH 4/4] arm64: dts: renesas: r8a774a1: Add dynamic power coefficient
  2019-06-12 14:20 [PATCH 0/4] Enhance Thermal support Biju Das
                   ` (2 preceding siblings ...)
  2019-06-12 14:20 ` [PATCH 3/4] arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA Biju Das
@ 2019-06-12 14:20 ` Biju Das
  2019-06-17  8:27 ` [PATCH 0/4] Enhance Thermal support Simon Horman
  4 siblings, 0 replies; 7+ messages in thread
From: Biju Das @ 2019-06-12 14:20 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland
  Cc: Biju Das, Simon Horman, Magnus Damm, linux-renesas-soc,
	devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro

Describe the dynamic power coefficient of A57 and A53 CPUs.

Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 6f52451..addf74c 100644
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -135,6 +135,7 @@
 			power-domains = <&sysc R8A774A1_PD_CA57_CPU0>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
+			dynamic-power-coefficient = <854>;
 			clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
 			operating-points-v2 = <&cluster0_opp>;
 			capacity-dmips-mhz = <1024>;
@@ -162,6 +163,7 @@
 			next-level-cache = <&L2_CA53>;
 			enable-method = "psci";
 			#cooling-cells = <2>;
+			dynamic-power-coefficient = <277>;
 			clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
 			capacity-dmips-mhz = <560>;
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH 0/4] Enhance Thermal support
  2019-06-12 14:20 [PATCH 0/4] Enhance Thermal support Biju Das
                   ` (3 preceding siblings ...)
  2019-06-12 14:20 ` [PATCH 4/4] arm64: dts: renesas: r8a774a1: Add dynamic power coefficient Biju Das
@ 2019-06-17  8:27 ` Simon Horman
  2019-06-18 10:42   ` Simon Horman
  4 siblings, 1 reply; 7+ messages in thread
From: Simon Horman @ 2019-06-17  8:27 UTC (permalink / raw)
  To: Biju Das
  Cc: Rob Herring, Mark Rutland, Magnus Damm, linux-renesas-soc,
	devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro,
	Niklas Söderlund

+ Niklas

On Wed, Jun 12, 2019 at 03:20:51PM +0100, Biju Das wrote:
> This series aims to enhance thermal support by adding cpu-map,
> capacity-dmips-mhz,thermal zone to support IPA and also adding 
> dynamic power coefficients.
> 
> For CPU capacity-dmips-mhz calculation
> -------------------------------------
> dhrystone cross complied using the command [1].
> [1] $CC -O3 -DTIME -fno-inline -fno-builtin-printf -Wno-implicit -march=armv8-a dhry_1.c dhry_2.c -o exe-dry
> 
> dhrystone is executed(with a loop value of 80000000) and took the average value for 5 iterations
> of CA57 and CA53.
> 
> IPA testing
> ----------
> 
> 1)Enable THERMAL_WRITABLE_TRIPS and THERMAL_STATISTICS in kernel
> 
> 2) Check the current  temperature(36.5 C) and check the cooling stats on device0 and device 1
> 
> Execute the below applications on an ssh session
> 
> 3) while true; do touch pic-`date +%s`.jpg;done &  will give almost 0.5 C jump on each instance
> 
> 4) Executing dhrystone will give 3-4 C jump(runs through the benchmark: 800000000)
> 
> 5) Now the current temperature is around 46.0 C and there is no change in cooling stats on device0 and device 1
> 
> 6) Now change the passive trip temperature to 42 C, At this time CPUFreq started kicking in trying to limit the temperature, which you can see through the cooling stats on device0 and device1. You can see the system trying to maintain the temperature around 42 C.
> 
> 7)  Without changing the load, Now change  the passive trip temperature to 100 C, the temperature rises back to 46 C again.

...

Thanks,

This looks fine to me but I will wait to see if there are other reviews
before applying.

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 0/4] Enhance Thermal support
  2019-06-17  8:27 ` [PATCH 0/4] Enhance Thermal support Simon Horman
@ 2019-06-18 10:42   ` Simon Horman
  0 siblings, 0 replies; 7+ messages in thread
From: Simon Horman @ 2019-06-18 10:42 UTC (permalink / raw)
  To: Biju Das
  Cc: Rob Herring, Mark Rutland, Magnus Damm, linux-renesas-soc,
	devicetree, Geert Uytterhoeven, Chris Paterson, Fabrizio Castro,
	Niklas Söderlund

On Mon, Jun 17, 2019 at 10:27:03AM +0200, Simon Horman wrote:
> + Niklas
> 
> On Wed, Jun 12, 2019 at 03:20:51PM +0100, Biju Das wrote:
> > This series aims to enhance thermal support by adding cpu-map,
> > capacity-dmips-mhz,thermal zone to support IPA and also adding 
> > dynamic power coefficients.
> > 
> > For CPU capacity-dmips-mhz calculation
> > -------------------------------------
> > dhrystone cross complied using the command [1].
> > [1] $CC -O3 -DTIME -fno-inline -fno-builtin-printf -Wno-implicit -march=armv8-a dhry_1.c dhry_2.c -o exe-dry
> > 
> > dhrystone is executed(with a loop value of 80000000) and took the average value for 5 iterations
> > of CA57 and CA53.
> > 
> > IPA testing
> > ----------
> > 
> > 1)Enable THERMAL_WRITABLE_TRIPS and THERMAL_STATISTICS in kernel
> > 
> > 2) Check the current  temperature(36.5 C) and check the cooling stats on device0 and device 1
> > 
> > Execute the below applications on an ssh session
> > 
> > 3) while true; do touch pic-`date +%s`.jpg;done &  will give almost 0.5 C jump on each instance
> > 
> > 4) Executing dhrystone will give 3-4 C jump(runs through the benchmark: 800000000)
> > 
> > 5) Now the current temperature is around 46.0 C and there is no change in cooling stats on device0 and device 1
> > 
> > 6) Now change the passive trip temperature to 42 C, At this time CPUFreq started kicking in trying to limit the temperature, which you can see through the cooling stats on device0 and device1. You can see the system trying to maintain the temperature around 42 C.
> > 
> > 7)  Without changing the load, Now change  the passive trip temperature to 100 C, the temperature rises back to 46 C again.
> 
> ...
> 
> Thanks,
> 
> This looks fine to me but I will wait to see if there are other reviews
> before applying.

Thanks again,

I have applied this series for inclusion in v5.3.

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2019-06-18 10:42 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-06-12 14:20 [PATCH 0/4] Enhance Thermal support Biju Das
2019-06-12 14:20 ` [PATCH 1/4] arm64: dts: renesas: r8a774a1: Add CPU topology on r8a774a1 SoC Biju Das
2019-06-12 14:20 ` [PATCH 2/4] arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz Biju Das
2019-06-12 14:20 ` [PATCH 3/4] arm64: dts: renesas: r8a774a1: Create thermal zone to support IPA Biju Das
2019-06-12 14:20 ` [PATCH 4/4] arm64: dts: renesas: r8a774a1: Add dynamic power coefficient Biju Das
2019-06-17  8:27 ` [PATCH 0/4] Enhance Thermal support Simon Horman
2019-06-18 10:42   ` Simon Horman

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