From: Icenowy Zheng <icenowy@aosc.io>
To: Rob Herring <robh+dt@kernel.org>,
Maxime Ripard <maxime.ripard@bootlin.com>,
Chen-Yu Tsai <wens@csie.org>,
Linus Walleij <linus.walleij@linaro.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com,
Icenowy Zheng <icenowy@aosc.io>, Rob Herring <robh@kernel.org>
Subject: [PATCH v3 5/9] dt-bindings: vendor-prefixes: add SoChip
Date: Sun, 23 Jun 2019 12:37:57 +0800 [thread overview]
Message-ID: <20190623043801.14040-6-icenowy@aosc.io> (raw)
In-Reply-To: <20190623043801.14040-1-icenowy@aosc.io>
Shenzhen SoChip Technology Co., Ltd. is a hardware vendor that produces
EVBs with Allwinner chips. There's also a SoC named S3 that is developed
by Allwinner (based on Allwinner V3/V3s) but branded SoChip.
Add the vendor prefix for SoChip.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Rob Herring <robh@kernel.org>
---
No changes in v3.
Changes in v2:
- Add the review tag by Rob.
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index d14604e58d96..92f50cac1055 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -859,6 +859,8 @@ patternProperties:
description: Standard Microsystems Corporation
"^snps,.*":
description: Synopsys, Inc.
+ "^sochip,.*":
+ description: Shenzhen SoChip Technology Co., Ltd.
"^socionext,.*":
description: Socionext Inc.
"^solidrun,.*":
--
2.21.0
next prev parent reply other threads:[~2019-06-23 4:37 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-23 4:37 [PATCH v3 0/9] Support for Allwinner V3/S3L and Sochip S3 Icenowy Zheng
[not found] ` <20190623043801.14040-1-icenowy-h8G6r0blFSE@public.gmane.org>
2019-06-23 4:37 ` [PATCH v3 1/9] pinctrl: sunxi: v3s: introduce support for V3 Icenowy Zheng
[not found] ` <20190623043801.14040-2-icenowy-h8G6r0blFSE@public.gmane.org>
2019-06-24 12:40 ` Maxime Ripard
2019-06-25 13:57 ` Linus Walleij
[not found] ` <CACRpkdaQSg4qWWF1XurWA8wnW+ezGtTympVT9DvkF87VKEQVzw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2019-06-25 14:10 ` Maxime Ripard
2019-06-23 4:37 ` [PATCH v3 3/9] dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU Icenowy Zheng
2019-06-23 4:37 ` [PATCH v3 4/9] clk: sunxi-ng: v3s: add Allwinner V3 support Icenowy Zheng
2019-07-09 22:56 ` Rob Herring
2019-06-23 4:38 ` [PATCH v3 8/9] dt-bindings: arm: sunxi: add binding for Lichee Zero Plus core board Icenowy Zheng
[not found] ` <20190623043801.14040-9-icenowy-h8G6r0blFSE@public.gmane.org>
2019-06-24 12:42 ` Maxime Ripard
2019-06-23 4:37 ` [PATCH v3 2/9] clk: sunxi-ng: v3s: add the missing PLL_DDR1 Icenowy Zheng
2019-06-23 4:37 ` Icenowy Zheng [this message]
[not found] ` <20190623043801.14040-6-icenowy-h8G6r0blFSE@public.gmane.org>
2019-06-25 13:55 ` [PATCH v3 5/9] dt-bindings: vendor-prefixes: add SoChip Linus Walleij
2019-06-25 17:39 ` Rob Herring
2019-06-23 4:37 ` [PATCH v3 6/9] ARM: sunxi: dts: s3/s3l/v3: add DTSI files for S3/S3L/V3 SoCs Icenowy Zheng
2019-06-23 4:37 ` [PATCH v3 7/9] dt-bindings: vendor-prefixes: add Sipeed Icenowy Zheng
[not found] ` <20190623043801.14040-8-icenowy-h8G6r0blFSE@public.gmane.org>
2019-07-09 22:57 ` Rob Herring
2019-06-23 4:38 ` [PATCH v3 9/9] ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3 Icenowy Zheng
[not found] ` <20190623043801.14040-10-icenowy-h8G6r0blFSE@public.gmane.org>
2019-06-24 12:43 ` Maxime Ripard
2019-06-24 13:43 ` Icenowy Zheng
[not found] ` <1E6AB747-5A4C-4515-A0EB-F0E89F520CF7-h8G6r0blFSE@public.gmane.org>
2019-06-24 13:48 ` Maxime Ripard
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