From mboxrd@z Thu Jan 1 00:00:00 1970 From: jun.li@nxp.com Subject: [PATCH 3/5] clk: imx8mm: correct the usb1_ctrl parent to be usb_bus Date: Wed, 3 Jul 2019 15:23:25 +0800 Message-ID: <20190703072327.38165-1-jun.li@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: shawnguo@kernel.org, sboyd@kernel.org, robh+dt@kernel.org Cc: mark.rutland@arm.com, Peter.Chen@nxp.com, peng.fan@nxp.com, ping.bai@nxp.com, Anson.Huang@nxp.com, devicetree@vger.kernel.org, daniel.baluta@nxp.com, mturquette@baylibre.com, linux-clk@vger.kernel.org, linux-imx@nxp.com, kernel@pengutronix.de, aisheng.dong@nxp.com, leonard.crestez@nxp.com, festevam@gmail.com, s.hauer@pengutronix.de, linux-arm-kernel@lists.infradead.org, jun.li@nxp.com List-Id: devicetree@vger.kernel.org From: Li Jun Per latest imx8mm datasheet of CCM, the parent of usb1_ctrl_root_clk should be usb_bus. Signed-off-by: Li Jun --- drivers/clk/imx/clk-imx8mm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index 6b8e75d..735cf9d 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -631,7 +631,7 @@ static int __init imx8mm_clocks_init(struct device_node *ccm_node) clks[IMX8MM_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0); clks[IMX8MM_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0); clks[IMX8MM_CLK_UART4_ROOT] = imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0); - clks[IMX8MM_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_core_ref", base + 0x44d0, 0); + clks[IMX8MM_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0); clks[IMX8MM_CLK_GPU3D_ROOT] = imx_clk_gate4("gpu3d_root_clk", "gpu3d_div", base + 0x44f0, 0); clks[IMX8MM_CLK_USDHC1_ROOT] = imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0); clks[IMX8MM_CLK_USDHC2_ROOT] = imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0); -- 2.7.4