From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gregory CLEMENT Subject: [PATCH v2 3/4] dt-bindings: iommu/arm,smmu: add compatible string for Marvell Date: Thu, 11 Jul 2019 17:02:41 +0200 Message-ID: <20190711150242.25290-4-gregory.clement@bootlin.com> References: <20190711150242.25290-1-gregory.clement@bootlin.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20190711150242.25290-1-gregory.clement@bootlin.com> Sender: linux-kernel-owner@vger.kernel.org To: Robin Murphy , Joerg Roedel , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org Cc: Rob Herring , devicetree@vger.kernel.org, Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory CLEMENT , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Antoine Tenart , =?UTF-8?q?Miqu=C3=A8l=20Raynal?= , Maxime Chevallier , Nadav Haklai , Hanna Hawa List-Id: devicetree@vger.kernel.org From: Hanna Hawa Add specific compatible string for Marvell usage due errata of accessing 64bits registers of ARM SMMU, in AP806. AP806 SoC uses the generic ARM-MMU500, and there's no specific implementation of Marvell, this compatible is used for errata only. Signed-off-by: Hanna Hawa Signed-off-by: Gregory CLEMENT --- Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt index 3133f3ba7567..7ed58d51846e 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt @@ -16,6 +16,7 @@ conditions. "arm,mmu-400" "arm,mmu-401" "arm,mmu-500" + "marvell,mmu-500" "cavium,smmu-v2" "qcom,smmu-v2" -- 2.20.1