From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Jeffery Subject: [RFC PATCH 17/17] ARM: dts: aspeed-g5: Sort LPC child nodes by unit address Date: Fri, 26 Jul 2019 15:09:59 +0930 Message-ID: <20190726053959.2003-18-andrew@aj.id.au> References: <20190726053959.2003-1-andrew@aj.id.au> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20190726053959.2003-1-andrew@aj.id.au> Sender: linux-kernel-owner@vger.kernel.org To: linux-aspeed@lists.ozlabs.org Cc: Andrew Jeffery , robh+dt@kernel.org, mark.rutland@arm.com, joel@jms.id.au, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org List-Id: devicetree@vger.kernel.org Lets try to maintain some sort of sanity. Signed-off-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed-g5.dtsi | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 50ba58dc5093..99d2995a43db 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -423,17 +423,18 @@ status = "disabled"; }; - lhc: lhc@20 { - compatible = "aspeed,ast2500-lhc"; - reg = <0x20 0x24 0x48 0x8>; - }; - lpc_reset: reset-controller@18 { compatible = "aspeed,ast2500-lpc-reset"; reg = <0x18 0x4>; #reset-cells = <1>; }; + lhc: lhc@20 { + compatible = "aspeed,ast2500-lhc"; + reg = <0x20 0x24 0x48 0x8>; + }; + + ibt: ibt@c0 { compatible = "aspeed,ast2500-ibt-bmc"; reg = <0xc0 0x18>; -- 2.20.1