From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Jeffery Subject: [PATCH 01/17] ARM: dts: aspeed-g5: Move EDAC node to APB Date: Fri, 26 Jul 2019 15:09:43 +0930 Message-ID: <20190726053959.2003-2-andrew@aj.id.au> References: <20190726053959.2003-1-andrew@aj.id.au> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20190726053959.2003-1-andrew@aj.id.au> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: linux-aspeed@lists.ozlabs.org Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, Andrew Jeffery , linux-kernel@vger.kernel.org, robh+dt@kernel.org, joel@jms.id.au, Stefan M Schaeckeler , linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org Previously the register interface was not attached to any internal bus, which is not correct - it lives on the APB. Cc: Stefan M Schaeckeler Signed-off-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed-g5.dtsi | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 5b1ca265c2ce..7723afc7c249 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -47,13 +47,6 @@ reg = <0x80000000 0>; }; - edac: sdram@1e6e0000 { - compatible = "aspeed,ast2500-sdram-edac"; - reg = <0x1e6e0000 0x174>; - interrupts = <0>; - status = "disabled"; - }; - ahb { compatible = "simple-bus"; #address-cells = <1>; @@ -206,6 +199,13 @@ #size-cells = <1>; ranges; + edac: sdram@1e6e0000 { + compatible = "aspeed,ast2500-sdram-edac"; + reg = <0x1e6e0000 0x174>; + interrupts = <0>; + status = "disabled"; + }; + syscon: syscon@1e6e2000 { compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd"; reg = <0x1e6e2000 0x1a8>; -- 2.20.1