From: Nicolin Chen <nicoleotsuka@gmail.com>
To: Daniel Baluta <daniel.baluta@nxp.com>
Cc: broonie@kernel.org, l.stach@pengutronix.de,
mihai.serban@gmail.com, alsa-devel@alsa-project.org,
timur@kernel.org, shengjiu.wang@nxp.com, angus@akkea.ca,
tiwai@suse.com, linux-imx@nxp.com, kernel@pengutronix.de,
festevam@gmail.com, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, robh@kernel.org,
Mihai Serban <mihai.serban@nxp.com>
Subject: Re: [PATCH v3 3/5] ASoC: fsl_sai: Add support for SAI new version
Date: Tue, 6 Aug 2019 18:40:35 -0700 [thread overview]
Message-ID: <20190807014035.GF8938@Asurada-Nvidia.nvidia.com> (raw)
In-Reply-To: <20190806151214.6783-4-daniel.baluta@nxp.com>
On Tue, Aug 06, 2019 at 06:12:12PM +0300, Daniel Baluta wrote:
> New IP version introduces Version ID and Parameter registers
> and optionally added Timestamp feature.
>
> VERID and PARAM registers are placed at the top of registers
> address space and some registers are shifted according to
> the following table:
>
> Tx/Rx data registers and Tx/Rx FIFO registers keep their
> addresses, all other registers are shifted by 8.
>
> SAI Memory map is described in chapter 13.10.4.1.1 I2S Memory map
> of the Reference Manual [1].
>
> In order to make as less changes as possible we attach an offset
> to each register offset to each changed register definition. The
> offset is read from each board private data.
>
> [1]https://cache.nxp.com/secured/assets/documents/en/reference-manual/IMX8MDQLQRM.pdf?__gda__=1563728701_38bea7f0f726472cc675cb141b91bec7&fileExt=.pdf
>
> Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
> [initial coding in the NXP internal tree]
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> [bugfixing and cleanups]
> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> [adapted to linux-next]
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
One small request that we can do with a separate patch later:
> struct fsl_sai_soc_data {
> bool use_imx_pcm;
> unsigned int fifo_depth;
> + unsigned int reg_offset;
> };
I think we need a list of comments for the structure defines.
It might be okay for the old two entries but reg_offset isn't
that explicit any more.
next prev parent reply other threads:[~2019-08-07 1:40 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-06 15:12 [PATCH v3 0/5] Add support for new SAI IP version Daniel Baluta
2019-08-06 15:12 ` [PATCH v3 1/5] ASoC: fsl_sai: Add registers definition for multiple datalines Daniel Baluta
2019-08-07 1:16 ` Nicolin Chen
2019-08-07 13:30 ` Applied "ASoC: fsl_sai: Add registers definition for multiple datalines" to the asoc tree Mark Brown
2019-08-06 15:12 ` [PATCH v3 2/5] ASoC: fsl_sai: Update Tx/Rx channel enable mask Daniel Baluta
2019-08-07 1:17 ` Nicolin Chen
2019-08-07 13:30 ` Applied "ASoC: fsl_sai: Update Tx/Rx channel enable mask" to the asoc tree Mark Brown
2019-08-06 15:12 ` [PATCH v3 3/5] ASoC: fsl_sai: Add support for SAI new version Daniel Baluta
2019-08-07 1:40 ` Nicolin Chen [this message]
2019-08-07 13:30 ` Applied "ASoC: fsl_sai: Add support for SAI new version" to the asoc tree Mark Brown
2019-08-06 15:12 ` [PATCH v3 4/5] ASoC: fsl_sai: Add support for imx7ulp/imx8mq Daniel Baluta
2019-08-07 13:30 ` Applied "ASoC: fsl_sai: Add support for imx7ulp/imx8mq" to the asoc tree Mark Brown
2019-08-06 15:12 ` [PATCH v3 5/5] ASoC: dt-bindings: Introduce compatible strings for 7ULP and 8MQ Daniel Baluta
2019-08-07 1:42 ` Nicolin Chen
2019-08-07 13:30 ` Applied "ASoC: dt-bindings: Introduce compatible strings for 7ULP and 8MQ" to the asoc tree Mark Brown
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