From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Murray Subject: Re: [PATCH 1/4] dt-bingings: PCI: Remove the num-lanes from Required properties Date: Mon, 12 Aug 2019 09:45:17 +0100 Message-ID: <20190812084517.GW56241@e119886-lin.cambridge.arm.com> References: <20190812042435.25102-1-Zhiqiang.Hou@nxp.com> <20190812042435.25102-2-Zhiqiang.Hou@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20190812042435.25102-2-Zhiqiang.Hou@nxp.com> Sender: linux-kernel-owner@vger.kernel.org To: "Z.q. Hou" Cc: "linux-pci@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "gustavo.pimentel@synopsys.com" , "jingoohan1@gmail.com" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" , "M.h. Lian" , Kishon Vijay Abraham I , Gabriele Paoloni List-Id: devicetree@vger.kernel.org On Mon, Aug 12, 2019 at 04:22:16AM +0000, Z.q. Hou wrote: > From: Hou Zhiqiang > > The num-lanes is not a mandatory property, e.g. on FSL > Layerscape SoCs, the PCIe link training is completed > automatically base on the selected SerDes protocol, it > doesn't need the num-lanes to set-up the link width. > > It has been added in the Optional properties. This > patch is to remove it from the Required properties. For clarity, maybe this paragraph can be reworded to: "It is previously in both Required and Optional properties, let's remove it from the Required properties". I don't understand why this property is previously in both required and optional... It looks like num-lanes was first made optional back in 2015 and removed from the Required section (907fce090253). But then re-added back into the Required section in 2017 with the adition of bindings for EP mode (b12befecd7de). Is num-lanes actually required for EP mode? Thanks, Andrew Murray > > Signed-off-by: Hou Zhiqiang > --- > Documentation/devicetree/bindings/pci/designware-pcie.txt | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt > index 5561a1c060d0..bd880df39a79 100644 > --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt > @@ -11,7 +11,6 @@ Required properties: > the ATU address space. > (The old way of getting the configuration address space from "ranges" > is deprecated and should be avoided.) > -- num-lanes: number of lanes to use > RC mode: > - #address-cells: set to <3> > - #size-cells: set to <2> > -- > 2.17.1 >