From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v4 04/10] mailbox: sunxi-msgbox: Add a new mailbox driver Date: Tue, 20 Aug 2019 10:27:51 +0200 Message-ID: <20190820082751.nfn76nlgl3ivphff@flea> References: <20190820032311.6506-1-samuel@sholland.org> <20190820032311.6506-5-samuel@sholland.org> Reply-To: maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="gkmhex6scyynmxz2" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20190820032311.6506-5-samuel-RkNLwX/CsU9g9hUCZPvPmw@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Samuel Holland Cc: Chen-Yu Tsai , Jassi Brar , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Corentin Labbe , Vasily Khoruzhick , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org --gkmhex6scyynmxz2 Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline Hi, On Mon, Aug 19, 2019 at 10:23:05PM -0500, Samuel Holland wrote: > Allwinner sun8i, sun9i, and sun50i SoCs contain a hardware message box > used for communication between the ARM CPUs and the ARISC management > coprocessor. The hardware contains 8 unidirectional 4-message FIFOs. > > Add a driver for it, so it can be used for SCPI or other communication > protocols. > > Signed-off-by: Samuel Holland > --- > drivers/mailbox/Kconfig | 10 + > drivers/mailbox/Makefile | 2 + > drivers/mailbox/sunxi-msgbox.c | 323 +++++++++++++++++++++++++++++++++ > 3 files changed, 335 insertions(+) > create mode 100644 drivers/mailbox/sunxi-msgbox.c It's pretty much the same remark than for the name of the binding file, but sunxi in itself is pretty confusing, it covers a range of SoCs going from armv5 to armv8, some with a single CPU and some with more, and some with an OpenRISC core and some without. It would be less confusing (albeit not perfect) to use sun6i there, the family that IP was first introduced in. Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com --gkmhex6scyynmxz2--