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From: Rob Herring <robh@kernel.org>
To: Henry Chen <henryc.chen@mediatek.com>
Cc: Georgi Djakov <georgi.djakov@linaro.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Viresh Kumar <vireshk@kernel.org>,
	Stephen Boyd <swboyd@chromium.org>,
	Ryan Case <ryandcase@chromium.org>,
	Nicolas Boichat <drinkcat@google.com>,
	Fan Chen <fan.chen@mediatek.com>,
	James Liao <jamesjj.liao@mediatek.com>,
	Weiyi Lu <weiyi.lu@mediatek.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V3 08/10] dt-bindings: interconnect: add MT8183 interconnect dt-bindings
Date: Mon, 02 Sep 2019 14:38:46 +0100	[thread overview]
Message-ID: <20190902033045.GA10734@bogus> (raw)
In-Reply-To: <1566995328-15158-9-git-send-email-henryc.chen@mediatek.com>

On Wed, Aug 28, 2019 at 08:28:46PM +0800, Henry Chen wrote:
> Add interconnect provider dt-bindings for MT8183.
> 
> Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
> ---
>  .../devicetree/bindings/soc/mediatek/dvfsrc.txt        |  9 +++++++++
>  include/dt-bindings/interconnect/mtk,mt8183-emi.h      | 18 ++++++++++++++++++
>  2 files changed, 27 insertions(+)
>  create mode 100644 include/dt-bindings/interconnect/mtk,mt8183-emi.h
> 
> diff --git a/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt b/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt
> index 7f43499..da98ec9 100644
> --- a/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt
> +++ b/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt
> @@ -12,6 +12,11 @@ Required Properties:
>  - clock-names: Must include the following entries:
>  	"dvfsrc": DVFSRC module clock
>  - clocks: Must contain an entry for each entry in clock-names.
> +- #interconnect-cells : should contain 1
> +- interconnect : interconnect providers support dram bandwidth requirements.
> +	The provider is able to communicate with the DVFSRC and send the dram
> +	bandwidth to it. shall contain only one of the following:
> +	"mediatek,mt8183-emi"
>  
>  Example:
>  
> @@ -20,4 +25,8 @@ Example:
>  		reg = <0 0x10012000 0 0x1000>;
>  		clocks = <&infracfg CLK_INFRA_DVFSRC>;
>  		clock-names = "dvfsrc";
> +		ddr_emi: interconnect {

The EMI is a sub-module in the DVFSRC? This is the DDR controller or 
something else?


> +			compatible = "mediatek,mt8183-emi";
> +			#interconnect-cells = <1>;
> +		};
>  	};

  reply	other threads:[~2019-09-02 13:38 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-28 12:28 [PATCH V3 00/10] Add driver for dvfsrc, support for active state of scpsys Henry Chen
2019-08-28 12:28 ` [PATCH V3 01/10] dt-bindings: soc: Add dvfsrc driver bindings Henry Chen
2019-08-29 19:16   ` Rob Herring
2019-08-30  5:26     ` Henry Chen
2019-08-28 12:28 ` [PATCH V3 02/10] dt-bindings: soc: Add opp table on scpsys bindings Henry Chen
2019-08-29 19:16   ` Rob Herring
2019-08-28 12:28 ` [PATCH V3 03/10] soc: mediatek: add support for the performance state Henry Chen
2019-08-28 12:28 ` [PATCH V3 04/10] arm64: dts: mt8183: add performance state support of scpsys Henry Chen
2019-08-28 12:28 ` [PATCH V3 05/10] soc: mediatek: add header for mediatek SIP interface Henry Chen
2019-08-28 12:28 ` [PATCH V3 06/10] soc: mediatek: add MT8183 dvfsrc support Henry Chen
2019-08-28 12:28 ` [PATCH V3 07/10] arm64: dts: mt8183: add dvfsrc related nodes Henry Chen
     [not found] ` <1566995328-15158-1-git-send-email-henryc.chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2019-08-28 12:28   ` [PATCH V3 08/10] dt-bindings: interconnect: add MT8183 interconnect dt-bindings Henry Chen
2019-09-02 13:38     ` Rob Herring [this message]
2019-09-03 12:36       ` Henry Chen
2019-08-28 12:28 ` [PATCH V3 09/10] interconnect: mediatek: Add mt8183 interconnect provider driver Henry Chen
2019-09-24 23:53   ` Georgi Djakov
2019-08-28 12:28 ` [PATCH V3 10/10] arm64: dts: mt8183: Add interconnect provider DT nodes Henry Chen

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