From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: [PATCH v3 4/5] arm64: Add support for arch_memremap_ro() Date: Tue, 10 Sep 2019 09:09:02 -0700 Message-ID: <20190910160903.65694-5-swboyd@chromium.org> References: <20190910160903.65694-1-swboyd@chromium.org> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20190910160903.65694-1-swboyd@chromium.org> Sender: linux-kernel-owner@vger.kernel.org To: Dan Williams Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Evan Green , Rob Herring , Bjorn Andersson , Andy Gross , Will Deacon , Catalin Marinas List-Id: devicetree@vger.kernel.org Pass in PAGE_KERNEL_RO to the underlying IO mapping mechanism to get a read-only mapping for the MEMREMAP_RO type of memory mappings that memremap() supports. Cc: Evan Green Cc: Rob Herring Cc: Bjorn Andersson Cc: Andy Gross Cc: Will Deacon Cc: Catalin Marinas Cc: Dan Williams Reviewed-by: Bjorn Andersson Acked-by: Catalin Marinas Signed-off-by: Stephen Boyd --- arch/arm64/include/asm/io.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 7ed92626949d..c623e75d9152 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -172,6 +172,7 @@ extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size); #define ioremap_nocache(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) #define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC)) #define ioremap_wt(addr, size) __ioremap((addr), (size), __pgprot(PROT_DEVICE_nGnRE)) +#define arch_memremap_ro(addr, size) __ioremap((addr), (size), PAGE_KERNEL_RO) #define iounmap __iounmap /* -- Sent by a computer through tubes