From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paul Kocialkowski Subject: Re: [PATCH v3 5/5] gpio: syscon: Add support for the Xylon LogiCVC GPIOs Date: Thu, 3 Oct 2019 07:26:56 -0400 Message-ID: <20191003112656.GB28856@aptenodytes> References: <20190927100407.1863293-1-paul.kocialkowski@bootlin.com> <20190927100407.1863293-6-paul.kocialkowski@bootlin.com> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="ftEhullJWpWg/VHq" Return-path: Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Bartosz Golaszewski Cc: linux-gpio , linux-devicetree , LKML , Linus Walleij , Rob Herring , Mark Rutland , Lee Jones , Thomas Petazzoni List-Id: devicetree@vger.kernel.org --ftEhullJWpWg/VHq Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi and thanks for the review! On Thu 03 Oct 19, 10:26, Bartosz Golaszewski wrote: > Hi Paul, >=20 > just two nits: >=20 > pt., 27 wrz 2019 o 12:04 Paul Kocialkowski > napisa=C5=82(a): > > > > The LogiCVC display hardware block comes with GPIO capabilities > > that must be exposed separately from the main driver (as GPIOs) for > > use with regulators and panels. A syscon is used to share the same > > regmap across the two drivers. > > > > Since the GPIO capabilities are pretty simple, add them to the syscon > > GPIO driver. > > > > Signed-off-by: Paul Kocialkowski > > --- > > drivers/gpio/gpio-syscon.c | 68 ++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 68 insertions(+) > > > > diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c > > index 05c537ed73f1..cdcb913b8f0c 100644 > > --- a/drivers/gpio/gpio-syscon.c > > +++ b/drivers/gpio/gpio-syscon.c > > @@ -190,6 +190,70 @@ static const struct syscon_gpio_data keystone_dsp_= gpio =3D { > > .set =3D keystone_gpio_set, > > }; > > > > +#define LOGICVC_CTRL_REG 0x40 > > +#define LOGICVC_CTRL_GPIO_SHIFT 11 > > +#define LOGICVC_CTRL_GPIO_BITS 5 > > + > > +#define LOGICVC_POWER_CTRL_REG 0x78 > > +#define LOGICVC_POWER_CTRL_GPIO_SHIFT 0 > > +#define LOGICVC_POWER_CTRL_GPIO_BITS 4 > > + > > +static void logicvc_gpio_offset(struct syscon_gpio_priv *priv, > > + unsigned offset, unsigned int *reg, > > + unsigned int *bit) > > +{ > > + if (offset >=3D LOGICVC_CTRL_GPIO_BITS) { > > + *reg =3D LOGICVC_POWER_CTRL_REG; > > + > > + /* To the (virtual) power ctrl offset. */ > > + offset -=3D LOGICVC_CTRL_GPIO_BITS; > > + /* To the actual bit offset in reg. */ > > + offset +=3D LOGICVC_POWER_CTRL_GPIO_SHIFT; > > + } else { > > + *reg =3D LOGICVC_CTRL_REG; > > + > > + /* To the actual bit offset in reg. */ > > + offset +=3D LOGICVC_CTRL_GPIO_SHIFT; > > + } > > + > > + *bit =3D BIT(offset); > > +} > > + > > +static int logicvc_gpio_get(struct gpio_chip *chip, unsigned offset) > > +{ > > + struct syscon_gpio_priv *priv =3D gpiochip_get_data(chip); > > + unsigned int reg; > > + unsigned int bit; > > + unsigned int value; >=20 > Can you put these on a single line? Sure thing. > > + int ret; > > + > > + logicvc_gpio_offset(priv, offset, ®, &bit); > > + > > + ret =3D regmap_read(priv->syscon, reg, &value); > > + if (ret) > > + return ret; > > + > > + return !!(value & bit); > > +} > > + > > +static void logicvc_gpio_set(struct gpio_chip *chip, unsigned offset, = int val) > > +{ > > + struct syscon_gpio_priv *priv =3D gpiochip_get_data(chip); > > + unsigned int reg; > > + unsigned int bit; >=20 > Same here. Will do! Cheers, Paul > > + > > + logicvc_gpio_offset(priv, offset, ®, &bit); > > + > > + regmap_update_bits(priv->syscon, reg, bit, val ? bit : 0); > > +} > > + > > +static const struct syscon_gpio_data logicvc_gpio =3D { > > + .flags =3D GPIO_SYSCON_FEAT_OUT, > > + .bit_count =3D LOGICVC_CTRL_GPIO_BITS + LOGICVC_POWER_CTRL= _GPIO_BITS, > > + .get =3D logicvc_gpio_get, > > + .set =3D logicvc_gpio_set, > > +}; > > + > > static const struct of_device_id syscon_gpio_ids[] =3D { > > { > > .compatible =3D "cirrus,ep7209-mctrl-gpio", > > @@ -203,6 +267,10 @@ static const struct of_device_id syscon_gpio_ids[]= =3D { > > .compatible =3D "rockchip,rk3328-grf-gpio", > > .data =3D &rockchip_rk3328_gpio_mute, > > }, > > + { > > + .compatible =3D "xylon,logicvc-3.02.a-gpio", > > + .data =3D &logicvc_gpio, > > + }, > > { } > > }; > > MODULE_DEVICE_TABLE(of, syscon_gpio_ids); > > -- > > 2.23.0 > > --=20 Paul Kocialkowski, Bootlin Embedded Linux and kernel engineering https://bootlin.com --ftEhullJWpWg/VHq Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEJZpWjZeIetVBefti3cLmz3+fv9EFAl2V2wAACgkQ3cLmz3+f v9EXmgf+M7DOLYFim8MRoBBPHg6VUTypsKrr003RgYerHk+laNEy/4udpTCO21vW KRvnQw+9uIhLZMAHOjpy7KQCT0gxCIyrVvBbEO5mIk44nqTLlv76nITiirEn04pi Boau1nRZ1IH8RzhecJroo5JsqcfVJQA7p/nsDM7XX4F2vRCjeX4soqb5iY5xbdnd P0BqnmUzRb9gx8l6bn2eAyX0YGiCcRgwrdpsG+Vh6Y0hFLjCJBMANJeRBazMA9yD hac6kPuxPmX1FzXNr53UWQbZUd7znDR2qDGgNraFy4xQCIucajivrJsXwoBOAdTT OzBqao5sxI1iL7ULfrwRBKXPMs4EDg== =31VS -----END PGP SIGNATURE----- --ftEhullJWpWg/VHq--