From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Jeffery Subject: [PATCH 1/2] dt-bindings: clock: Add AST2500 RMII RCLK definitions Date: Tue, 8 Oct 2019 22:05:22 +1030 Message-ID: <20191008113523.13601-2-andrew@aj.id.au> References: <20191008113523.13601-1-andrew@aj.id.au> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20191008113523.13601-1-andrew@aj.id.au> Sender: linux-kernel-owner@vger.kernel.org To: linux-clk@vger.kernel.org Cc: mturquette@baylibre.com, sboyd@kernel.org, joel@jms.id.au, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org List-Id: devicetree@vger.kernel.org The AST2500 has an explicit gate for the RMII RCLK for each of the two MACs. Signed-off-by: Andrew Jeffery --- include/dt-bindings/clock/aspeed-clock.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h index f43738607d77..64e245fb113f 100644 --- a/include/dt-bindings/clock/aspeed-clock.h +++ b/include/dt-bindings/clock/aspeed-clock.h @@ -39,6 +39,8 @@ #define ASPEED_CLK_BCLK 33 #define ASPEED_CLK_MPLL 34 #define ASPEED_CLK_24M 35 +#define ASPEED_CLK_GATE_MAC1RCLK 36 +#define ASPEED_CLK_GATE_MAC2RCLK 37 #define ASPEED_RESET_XDMA 0 #define ASPEED_RESET_MCTP 1 -- 2.20.1