devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Benoit Parrot <bparrot@ti.com>
To: Hans Verkuil <hverkuil@xs4all.nl>
Cc: Rob Herring <robh+dt@kernel.org>, <linux-media@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Jyri Sarha <jsarha@ti.com>
Subject: Re: [Patch 07/19] media: ti-vpe: cal: add CSI2 PHY LDO errata support
Date: Wed, 23 Oct 2019 11:03:50 -0500	[thread overview]
Message-ID: <20191023160349.3wsbtwghnixaiewf@ti.com> (raw)
In-Reply-To: <68dbd926-0e37-93f7-e03e-def4b4146d32@xs4all.nl>

Hans Verkuil <hverkuil@xs4all.nl> wrote on Mon [2019-Oct-21 12:38:03 +0200]:
> On 10/18/19 5:34 PM, Benoit Parrot wrote:
> > Apply Errata i913 every time the functional clock is enabled.
> > This should take care of suspend/resume case as well.
> > 
> > Signed-off-by: Benoit Parrot <bparrot@ti.com>
> > Signed-off-by: Jyri Sarha <jsarha@ti.com>
> > ---
> >  drivers/media/platform/ti-vpe/cal.c      | 56 +++++++++++++++++++++++-
> >  drivers/media/platform/ti-vpe/cal_regs.h | 27 ++++++++++++
> >  2 files changed, 82 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/media/platform/ti-vpe/cal.c b/drivers/media/platform/ti-vpe/cal.c
> > index 62aeedb705e9..3cbc4dca6de8 100644
> > --- a/drivers/media/platform/ti-vpe/cal.c
> > +++ b/drivers/media/platform/ti-vpe/cal.c
> > @@ -284,6 +284,13 @@ static struct cal_data dra72x_cal_data = {
> >  	.flags = 0,
> >  };
> >  
> > +static struct cal_data dra72x_es1_cal_data = {
> > +	.csi2_phy_core = dra72x_cal_csi_phy,
> > +	.num_csi2_phy = ARRAY_SIZE(dra72x_cal_csi_phy),
> > +
> > +	.flags = DRA72_CAL_PRE_ES2_LDO_DISABLE,
> > +};
> > +
> >  /*
> >   * there is one cal_dev structure in the driver, it is shared by
> >   * all instances.
> > @@ -569,9 +576,52 @@ static void cal_get_hwinfo(struct cal_dev *dev)
> >  		hwinfo);
> >  }
> >  
> > +/*
> > + *   Errata i913: CSI2 LDO Needs to be disabled when module is powered on
> > + *
> > + *   Enabling CSI2 LDO shorts it to core supply. It is crucial the 2 CSI2
> > + *   LDOs on the device are disabled if CSI-2 module is powered on
> > + *   (0x4845 B304 | 0x4845 B384 [28:27] = 0x1) or in ULPS (0x4845 B304
> > + *   | 0x4845 B384 [28:27] = 0x2) mode. Common concerns include: high
> > + *   current draw on the module supply in active mode.
> > + *
> > + *   Errata does not apply when CSI-2 module is powered off
> > + *   (0x4845 B304 | 0x4845 B384 [28:27] = 0x0).
> > + *
> > + * SW Workaround:
> > + *	Set the following register bits to disable the LDO,
> > + *	which is essentially CSI2 REG10 bit 6:
> > + *
> > + *		Core 0:  0x4845 B828 = 0x0000 0040
> > + *		Core 1:  0x4845 B928 = 0x0000 0040
> > + */
> > +static void i913_errata(struct cal_dev *dev, unsigned int port)
> > +{
> > +	u32 reg10 = reg_read(dev->cc[port], CAL_CSI2_PHY_REG10);
> > +
> > +	set_field(&reg10, CAL_CSI2_PHY_REG0_HSCLOCKCONFIG_DISABLE,
> > +		  CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK);
> > +
> > +	cal_dbg(1, dev, "CSI2_%d_REG10 = 0x%08x\n", port, reg10);
> > +	reg_write(dev->cc[port], CAL_CSI2_PHY_REG10, reg10);
> > +}
> > +
> >  static inline int cal_runtime_get(struct cal_dev *dev)
> 
> I'd drop the 'inline' here. It doesn't seem appropriate anymore since this
> function is now more complex.

Ok I'll fix that

Benoit

> 
> Regards,
> 
> 	Hans
> 
> >  {
> > -	return pm_runtime_get_sync(&dev->pdev->dev);
> > +	int r;
> > +
> > +	r = pm_runtime_get_sync(&dev->pdev->dev);
> > +
> > +	if (dev->flags & DRA72_CAL_PRE_ES2_LDO_DISABLE) {
> > +		/*
> > +		 * Apply errata on both port eveytime we (re-)enable
> > +		 * the clock
> > +		 */
> > +		i913_errata(dev, 0);
> > +		i913_errata(dev, 1);
> > +	}
> > +
> > +	return r;
> >  }
> >  
> >  static inline void cal_runtime_put(struct cal_dev *dev)
> > @@ -2071,6 +2121,10 @@ static const struct of_device_id cal_of_match[] = {
> >  		.compatible = "ti,dra72-cal",
> >  		.data = (void *)&dra72x_cal_data,
> >  	},
> > +	{
> > +		.compatible = "ti,dra72-pre-es2-cal",
> > +		.data = (void *)&dra72x_es1_cal_data,
> > +	},
> >  	{},
> >  };
> >  MODULE_DEVICE_TABLE(of, cal_of_match);
> > diff --git a/drivers/media/platform/ti-vpe/cal_regs.h b/drivers/media/platform/ti-vpe/cal_regs.h
> > index 68cfc922b422..78d6f015c9ea 100644
> > --- a/drivers/media/platform/ti-vpe/cal_regs.h
> > +++ b/drivers/media/platform/ti-vpe/cal_regs.h
> > @@ -10,6 +10,30 @@
> >  #ifndef __TI_CAL_REGS_H
> >  #define __TI_CAL_REGS_H
> >  
> > +/*
> > + * struct cal_dev.flags possibilities
> > + *
> > + * DRA72_CAL_PRE_ES2_LDO_DISABLE:
> > + *   Errata i913: CSI2 LDO Needs to be disabled when module is powered on
> > + *
> > + *   Enabling CSI2 LDO shorts it to core supply. It is crucial the 2 CSI2
> > + *   LDOs on the device are disabled if CSI-2 module is powered on
> > + *   (0x4845 B304 | 0x4845 B384 [28:27] = 0x1) or in ULPS (0x4845 B304
> > + *   | 0x4845 B384 [28:27] = 0x2) mode. Common concerns include: high
> > + *   current draw on the module supply in active mode.
> > + *
> > + *   Errata does not apply when CSI-2 module is powered off
> > + *   (0x4845 B304 | 0x4845 B384 [28:27] = 0x0).
> > + *
> > + * SW Workaround:
> > + *	Set the following register bits to disable the LDO,
> > + *	which is essentially CSI2 REG10 bit 6:
> > + *
> > + *		Core 0:  0x4845 B828 = 0x0000 0040
> > + *		Core 1:  0x4845 B928 = 0x0000 0040
> > + */
> > +#define DRA72_CAL_PRE_ES2_LDO_DISABLE BIT(0)
> > +
> >  #define CAL_NUM_CSI2_PORTS		2
> >  
> >  /* CAL register offsets */
> > @@ -71,6 +95,7 @@
> >  #define CAL_CSI2_PHY_REG0		0x000
> >  #define CAL_CSI2_PHY_REG1		0x004
> >  #define CAL_CSI2_PHY_REG2		0x008
> > +#define CAL_CSI2_PHY_REG10		0x028
> >  
> >  /* CAL Control Module Core Camerrx Control register offsets */
> >  #define CM_CTRL_CORE_CAMERRX_CONTROL	0x000
> > @@ -458,6 +483,8 @@
> >  #define CAL_CSI2_PHY_REG1_CLOCK_MISS_DETECTOR_STATUS_SUCCESS		0
> >  #define CAL_CSI2_PHY_REG1_RESET_DONE_STATUS_MASK		GENMASK(29, 28)
> >  
> > +#define CAL_CSI2_PHY_REG10_I933_LDO_DISABLE_MASK		BIT_MASK(6)
> > +
> >  #define CAL_CSI2_PHY_REG2_CCP2_SYNC_PATTERN_MASK		GENMASK(23, 0)
> >  #define CAL_CSI2_PHY_REG2_TRIGGER_CMD_RXTRIGESC3_MASK		GENMASK(25, 24)
> >  #define CAL_CSI2_PHY_REG2_TRIGGER_CMD_RXTRIGESC2_MASK		GENMASK(27, 26)
> > 
> 

  reply	other threads:[~2019-10-23 16:04 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-18 15:34 [Patch 00/19] media: ti-vpe: cal: maintenance Benoit Parrot
2019-10-18 15:34 ` [Patch 01/19] dt-bindings: media: cal: update binding to use syscon Benoit Parrot
2019-10-29 13:20   ` Rob Herring
2019-10-30 13:39     ` Benoit Parrot
2019-10-18 15:34 ` [Patch 02/19] dt-bindings: media: cal: update binding example Benoit Parrot
2019-10-29 13:21   ` Rob Herring
2019-10-30 13:41     ` Benoit Parrot
2019-10-18 15:34 ` [Patch 03/19] media: ti-vpe: cal: Add per platform data support Benoit Parrot
2019-10-29 13:18   ` Rob Herring
2019-10-30 13:34     ` Benoit Parrot
2019-10-18 15:34 ` [Patch 04/19] media: ti-vpe: cal: Enable DMABUF export Benoit Parrot
2019-10-18 15:34 ` [Patch 05/19] media: ti-vpe: cal: Restrict DMA to avoid memory corruption Benoit Parrot
2019-10-18 15:34 ` [Patch 06/19] dt-bindings: media: cal: update binding to add PHY LDO errata support Benoit Parrot
2019-10-29 13:23   ` Rob Herring
2019-10-18 15:34 ` [Patch 07/19] media: ti-vpe: cal: add CSI2 " Benoit Parrot
2019-10-21 10:38   ` Hans Verkuil
2019-10-23 16:03     ` Benoit Parrot [this message]
2019-10-18 15:34 ` [Patch 08/19] media: ti-vpe: cal: Fix ths_term/ths_settle parameters Benoit Parrot
2019-10-18 15:34 ` [Patch 09/19] media: ti-vpe: cal: Fix pixel processing parameters Benoit Parrot
2019-10-18 15:34 ` [Patch 10/19] media: ti-vpe: cal: Align DPHY init sequence with docs Benoit Parrot
2019-10-18 15:34 ` [Patch 11/19] dt-bindings: media: cal: update binding to add DRA76x support Benoit Parrot
2019-10-29 13:24   ` Rob Herring
2019-10-18 15:34 ` [Patch 12/19] media: ti-vpe: cal: Add " Benoit Parrot
2019-10-18 15:34 ` [Patch 13/19] dt-bindings: media: cal: update binding to add AM654 support Benoit Parrot
2019-10-29 13:24   ` Rob Herring
2019-10-18 15:34 ` [Patch 14/19] media: ti-vpe: cal: Add " Benoit Parrot
2019-10-18 15:34 ` [Patch 15/19] media: ti-vpe: cal: Add subdev s_power hooks Benoit Parrot
2019-10-18 15:34 ` [Patch 16/19] media: ti-vpe: cal: Properly calculate max resolution boundary Benoit Parrot
2019-10-18 15:34 ` [Patch 17/19] media: ti-vpe: cal: Fix a WARN issued when start streaming fails Benoit Parrot
2019-10-18 15:34 ` [Patch 18/19] media: ti-vpe: cal: fix enum_mbus_code/frame_size subdev arguments Benoit Parrot
2019-10-18 15:34 ` [Patch 19/19] dt-bindings: media: cal: convert binding to yaml Benoit Parrot
2019-10-21 10:49   ` Hans Verkuil
2019-10-23 16:06     ` Benoit Parrot
2019-10-22  7:46   ` Sakari Ailus
2019-10-23 16:18     ` Benoit Parrot
2019-10-24  6:13       ` Sakari Ailus
2019-10-29 14:22   ` Rob Herring
2019-10-30 13:54     ` Benoit Parrot
2019-10-21 10:50 ` [Patch 00/19] media: ti-vpe: cal: maintenance Hans Verkuil
2019-10-23 16:05   ` Benoit Parrot

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191023160349.3wsbtwghnixaiewf@ti.com \
    --to=bparrot@ti.com \
    --cc=devicetree@vger.kernel.org \
    --cc=hverkuil@xs4all.nl \
    --cc=jsarha@ti.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-media@vger.kernel.org \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).