[v3] arm64: dts: ls1028a: Update the property of the DT node dpclk

[v3] arm64: dts: ls1028a: Update the property of the DT node dpclk

[Wen He]

Update the property #clock-cells = <1> to #clock-cells = <0> of the
dpclk, since the Display output pixel clock driver provides single
clock output.

Signed-off-by: Wen He <wen.he_1@nxp.com>
---
change in v3:
        - according the maintainer correction node name
        - update the commit message

 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 51fa8f57fdac..616b150a15aa 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -82,7 +82,7 @@
 	dpclk: clock-controller@f1f0000 {
 		compatible = "fsl,ls1028a-plldig";
 		reg = <0x0 0xf1f0000 0x0 0xffff>;
-		#clock-cells = <1>;
+		#clock-cells = <0>;
 		clocks = <&osc_27m>;
 	};
 
@@ -665,7 +665,7 @@
 		interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 223 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "DE", "SE";
-		clocks = <&dpclk 0>, <&clockgen 2 2>, <&clockgen 2 2>,
+		clocks = <&dpclk>, <&clockgen 2 2>, <&clockgen 2 2>,
 			 <&clockgen 2 2>;
 		clock-names = "pxlclk", "mclk", "aclk", "pclk";
 		arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
-- 
2.17.1

Re: [v3] arm64: dts: ls1028a: Update the property of the DT node dpclk

[Shawn Guo]

On Mon, Oct 14, 2019 at 03:13:27PM +0800, Wen He wrote:
> Update the property #clock-cells = <1> to #clock-cells = <0> of the
> dpclk, since the Display output pixel clock driver provides single
> clock output.
> 
> Signed-off-by: Wen He <wen.he_1@nxp.com>

The patch subject can be more specific like:

  arm64: dts: ls1028a: Update #clock-cells of dpclk node

I updated it and applied patch.

Shawn

> ---
> change in v3:
>         - according the maintainer correction node name
>         - update the commit message
> 
>  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index 51fa8f57fdac..616b150a15aa 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -82,7 +82,7 @@
>  	dpclk: clock-controller@f1f0000 {
>  		compatible = "fsl,ls1028a-plldig";
>  		reg = <0x0 0xf1f0000 0x0 0xffff>;
> -		#clock-cells = <1>;
> +		#clock-cells = <0>;
>  		clocks = <&osc_27m>;
>  	};
>  
> @@ -665,7 +665,7 @@
>  		interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
>  			     <0 223 IRQ_TYPE_LEVEL_HIGH>;
>  		interrupt-names = "DE", "SE";
> -		clocks = <&dpclk 0>, <&clockgen 2 2>, <&clockgen 2 2>,
> +		clocks = <&dpclk>, <&clockgen 2 2>, <&clockgen 2 2>,
>  			 <&clockgen 2 2>;
>  		clock-names = "pxlclk", "mclk", "aclk", "pclk";
>  		arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
> -- 
> 2.17.1
> 

RE: [EXT] Re: [v3] arm64: dts: ls1028a: Update the property of the DT node dpclk

[Wen He]

> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: 2019年10月26日 17:50
> To: Wen He <wen.he_1@nxp.com>
> Cc: linux-devel@linux.nxdi.nxp.com; Leo Li <leoyang.li@nxp.com>; Rob Herring
> <robh+dt@kernel.org>; Mark Rutland <mark.rutland@arm.com>;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org
> Subject: [EXT] Re: [v3] arm64: dts: ls1028a: Update the property of the DT node
> dpclk
> 
> Caution: EXT Email
> 
> On Mon, Oct 14, 2019 at 03:13:27PM +0800, Wen He wrote:
> > Update the property #clock-cells = <1> to #clock-cells = <0> of the
> > dpclk, since the Display output pixel clock driver provides single
> > clock output.
> >
> > Signed-off-by: Wen He <wen.he_1@nxp.com>
> 
> The patch subject can be more specific like:
> 
>   arm64: dts: ls1028a: Update #clock-cells of dpclk node
> 
> I updated it and applied patch.

Thanks for your update, thank you. 

Best Regards,
Wen

> 
> Shawn
> 
> > ---
> > change in v3:
> >         - according the maintainer correction node name
> >         - update the commit message
> >
> >  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > index 51fa8f57fdac..616b150a15aa 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > @@ -82,7 +82,7 @@
> >       dpclk: clock-controller@f1f0000 {
> >               compatible = "fsl,ls1028a-plldig";
> >               reg = <0x0 0xf1f0000 0x0 0xffff>;
> > -             #clock-cells = <1>;
> > +             #clock-cells = <0>;
> >               clocks = <&osc_27m>;
> >       };
> >
> > @@ -665,7 +665,7 @@
> >               interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
> >                            <0 223 IRQ_TYPE_LEVEL_HIGH>;
> >               interrupt-names = "DE", "SE";
> > -             clocks = <&dpclk 0>, <&clockgen 2 2>, <&clockgen 2 2>,
> > +             clocks = <&dpclk>, <&clockgen 2 2>, <&clockgen 2 2>,
> >                        <&clockgen 2 2>;
> >               clock-names = "pxlclk", "mclk", "aclk", "pclk";
> >               arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
> > --
> > 2.17.1
> >