Re: [PATCH v7 0/5] Add initial support for S32V234-EVB

Re: [PATCH v7 0/5] Add initial support for S32V234-EVB

[Shawn Guo]

On Wed, Oct 16, 2019 at 04:54:58PM +0000, Stefan-gabriel Mirea wrote:
> On 10/16/2019 4:17 PM, Greg KH wrote:
> > 
> > I've taken patch 3 in my tty-next tree.  The others should probably go
> > through an arm-specific tree, right?
> 
> Thank you very much, Greg! That was all for the tty tree.
> 
> I think that the other patches should go to the following trees:
> * git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git:
>     patches #1 and possibly #4 (as it covers arch/*/boot/dts/);
> * git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git:
>     patches #2, #5 and possibly #4 (as it covers arch/arm64/boot/dts/)
> * git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
>     possibly patch #4 (as it covers arch/arm64/boot/dts/freescale/fsl-*)
> 
> As a general question, would it be any chance to have the device tree
> included in v5.4 (along with its compatible documentation and config
> definition, without enablement)? That is, only the patches #1, #2 and
> #4, because #3 is a cosmetic change and #5 enables the new configs by
> default. That would complete a minimal support for S32V234-EVB, together
> with the LINFlexD UART driver which was accepted.
> 
> From the development process documentation[1]: "An occasional exception
> is made for drivers for previously-unsupported hardware; if they touch
> no in-tree code, they cannot cause regressions and should be safe to add
> at any time".
> 
> I know that it mentions only drivers and not device trees, but from the
> history is seems that there have also been dts/dtsi files added outside
> of merge windows, such as:
> * arch/riscv/boot/dts/sifive/fu540-c000.dtsi;
> * arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts;
> * arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts;
> * arch/xtensa/boot/dts/lx200mx.dts;
> * arch/xtensa/boot/dts/kc705.dts;
> * arch/xtensa/boot/dts/xtfpga-flash-128m.dtsi;
> * arch/arm/boot/dts/omap3-beagle-xm-ab.dts;
> * arch/arm/boot/dts/at91-sama5d3_xplained.dts;
> * arch/arm/boot/dts/am335x-boneblack.dts;
> * arch/powerpc/boot/dts/charon.dts.
> 
> I am sorry if my question is inopportune, I am definitely not trying to
> rush anyone. I just ask because this has been under review for some
> time and all the feedback has been addressed. We would really appreciate
> to have this SoC and board supported in the following LTS release if
> there are no other issues.

Sorry, no.  It happens occasionally that non-fixing patches are merged
during -rc time, mostly because they are supposed to land mainline
during merge window, but missed the window for some reason, like
subsystem maintainers did not send pull request to Linus in time.
Also the patches are only taken in early -rc like rc2.

Shawn

Re: [PATCH v7 4/5] arm64: dts: fsl: Add device tree for S32V234-EVB

[Shawn Guo]

On Wed, Oct 16, 2019 at 03:48:26PM +0300, Stefan-Gabriel Mirea wrote:
> From: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
> 
> Add initial version of device tree for S32V234-EVB, including nodes for the
> 4 Cortex-A53 cores, AIPS bus with UART modules, ARM architected timer and
> Generic Interrupt Controller (GIC).
> 
> Keep SoC level separate from board level to let future boards with this SoC
> share common properties, while the dts files will keep board-dependent
> properties.
> 
> Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
> Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
> Signed-off-by: Dan Nica <dan.nica@nxp.com>
> Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
> Signed-off-by: Phu Luu An <phu.luuan@nxp.com>
> Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/Makefile        |   2 +
>  arch/arm64/boot/dts/freescale/s32v234-evb.dts |  25 ++++
>  arch/arm64/boot/dts/freescale/s32v234.dtsi    | 139 ++++++++++++++++++
>  3 files changed, 166 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/freescale/s32v234-evb.dts
>  create mode 100644 arch/arm64/boot/dts/freescale/s32v234.dtsi
> 
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index 93fce8f0c66d..730209adb2bc 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -32,3 +32,5 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
>  dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
> +
> +dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb
> diff --git a/arch/arm64/boot/dts/freescale/s32v234-evb.dts b/arch/arm64/boot/dts/freescale/s32v234-evb.dts
> new file mode 100644
> index 000000000000..4b802518cefc
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/s32v234-evb.dts
> @@ -0,0 +1,25 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright 2015-2016 Freescale Semiconductor, Inc.
> + * Copyright 2016-2017 NXP
> + */
> +
> +/dts-v1/;
> +#include "s32v234.dtsi"
> +
> +/ {
> +	model = "NXP S32V234-EVB2 Board";
> +	compatible = "fsl,s32v234-evb", "fsl,s32v234";
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&uart1 {
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/freescale/s32v234.dtsi b/arch/arm64/boot/dts/freescale/s32v234.dtsi
> new file mode 100644
> index 000000000000..37225191ccbf
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/s32v234.dtsi
> @@ -0,0 +1,139 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright 2015-2016 Freescale Semiconductor, Inc.
> + * Copyright 2016-2018 NXP
> + */
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/memreserve/ 0x80000000 0x00010000;
> +
> +/ {
> +	compatible = "fsl,s32v234";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	aliases {
> +		serial0 = &uart0;
> +		serial1 = &uart1;
> +	};
> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		cpu0: cpu@0 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			reg = <0x0 0x0>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x80000000>;
> +			next-level-cache = <&cluster0_l2_cache>;
> +		};
> +
> +		cpu1: cpu@1 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			reg = <0x0 0x1>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x80000000>;
> +			next-level-cache = <&cluster0_l2_cache>;
> +		};
> +
> +		cpu2: cpu@100 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			reg = <0x0 0x100>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x80000000>;
> +			next-level-cache = <&cluster1_l2_cache>;
> +		};
> +
> +		cpu3: cpu@101 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			reg = <0x0 0x101>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x80000000>;
> +			next-level-cache = <&cluster1_l2_cache>;
> +		};
> +
> +		cluster0_l2_cache: l2-cache0 {
> +			compatible = "cache";
> +		};
> +
> +		cluster1_l2_cache: l2-cache1 {
> +			compatible = "cache";
> +		};
> +	};
> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
> +					  IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
> +					  IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
> +					  IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
> +					  IRQ_TYPE_LEVEL_LOW)>;
> +		/* clock-frequency might be modified by u-boot, depending on the
> +		 * chip version.
> +		 */
> +		clock-frequency = <10000000>;
> +	};
> +
> +	gic: interrupt-controller@7d001000 {
> +		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> +		#interrupt-cells = <3>;
> +		#address-cells = <0>;
> +		interrupt-controller;
> +		reg = <0 0x7d001000 0 0x1000>,
> +		      <0 0x7d002000 0 0x2000>,
> +		      <0 0x7d004000 0 0x2000>,
> +		      <0 0x7d006000 0 0x2000>;
> +		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
> +					 IRQ_TYPE_LEVEL_HIGH)>;
> +	};
> +
> +	soc {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		compatible = "simple-bus";
> +		interrupt-parent = <&gic>;
> +		ranges;
> +
> +		aips0: aips-bus@40000000 {
> +			compatible = "simple-bus";
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			interrupt-parent = <&gic>;
> +			reg = <0x0 0x40000000 0x0 0x7D000>;

We should consistently use lowercase for hex values in device tree.

I fixed it up during applying.

Shawn

> +			ranges;
> +
> +			uart0: serial@40053000 {
> +				compatible = "fsl,s32v234-linflexuart";
> +				reg = <0x0 0x40053000 0x0 0x1000>;
> +				interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>;
> +				status = "disabled";
> +			};
> +		};
> +
> +		aips1: aips-bus@40080000 {
> +			compatible = "simple-bus";
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			interrupt-parent = <&gic>;
> +			reg = <0x0 0x40080000 0x0 0x70000>;
> +			ranges;
> +
> +			uart1: serial@400bc000 {
> +				compatible = "fsl,s32v234-linflexuart";
> +				reg = <0x0 0x400bc000 0x0 0x1000>;
> +				interrupts = <GIC_SPI 60 IRQ_TYPE_EDGE_RISING>;
> +				status = "disabled";
> +			};
> +		};
> +	};
> +};
> -- 
> 2.22.0
> 

Re: [PATCH v7 0/5] Add initial support for S32V234-EVB

[Shawn Guo]

On Wed, Oct 16, 2019 at 03:48:22PM +0300, Stefan-Gabriel Mirea wrote:
> Eddy Petrișor (1):
>   dt-bindings: arm: fsl: Add the S32V234-EVB board
> 
> Mihaela Martinas (2):
>   arm64: Introduce config for S32
>   arm64: defconfig: Enable configs for S32V234
...
> Stoica Cosmin-Stefan (1):
>   arm64: dts: fsl: Add device tree for S32V234-EVB

Applied these 4, thanks.

Re: [PATCH v7 0/5] Add initial support for S32V234-EVB

[Stefan-gabriel Mirea]

Hello Shawn,

On 10/26/2019 4:27 PM, Shawn Guo wrote:
> 
> Sorry, no.  It happens occasionally that non-fixing patches are merged
> during -rc time, mostly because they are supposed to land mainline
> during merge window, but missed the window for some reason, like
> subsystem maintainers did not send pull request to Linus in time.
> Also the patches are only taken in early -rc like rc2.
> 

Okay, thank you for your clarification!

Regards,
Stefan